32186 datasheet(15/1032 Pages) RENESAS

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Contents-10

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

CHAPTER 16 NON-BREAK DEBUG (NBD)

16.1 Outline of Non-Break Debug (NBD) ................................................................................................. 16-2

16.2 Pin Functions of NBD ....................................................................................................................... 16-4

16.2.1 NBD Pin Control Register ......................................................................................................... 16-4

16.3 NBD Related Registers .................................................................................................................... 16-6

16.3.1 NBD Enable Register ............................................................................................................... 16-6

16.4 Communication Protocol .................................................................................................................. 16-7

16.5 RAM Monitor Function ...................................................................................................................... 16-8

16.5.1 Description of NBD Operation .................................................................................................. 16-8

16.5.2 NBDD Data Format .................................................................................................................. 16-9

16.6 Event Detection Function ................................................................................................................. 16-11

16.6.1 Event Address Setting Register ................................................................................................ 16-11

16.6.2 Event Condition Setting Register ............................................................................................. 16-12

16.6.3 Event Generation Register ....................................................................................................... 16-12

CHAPTER 17 EXTERNAL BUS INTERFACE

17.1 Outline of External Bus Interface ...................................................................................................... 17-2

17.1.1 External Bus Interface Related Signals .................................................................................... 17-2

17.2 External Bus Interface Related Registers ........................................................................................ 17-5

17.2.1 Port Operation Mode and Port Peripheral Function Select Registers ...................................... 17-5

17.2.2 Bus Mode Control Register ...................................................................................................... 17-15

17.2.3 CLKOUT Select Register ......................................................................................................... 17-16

17.3 Read/Write Operations ..................................................................................................................... 17-19

17.4 Bus Arbitration .................................................................................................................................. 17-25

17.5 Typical Connection of External Extension Memory .......................................................................... 17-27

17.6 Example of Bus Voltage Settings Using VCC-BUS .......................................................................... 17-30

CHAPTER 18 WAIT CONTROLLER

18.1 Outline of Wait Controller ................................................................................................................. 18-2

18.2 Wait Controller Related Registers .................................................................................................... 18-4

18.2.1 CS Area Wait Control Registers ............................................................................................... 18-4

18.2.2 Flash E/W Wait Select Register ............................................................................................... 18-6

18.3 Typical Operation of Wait Controller ................................................................................................. 18-7

CHAPTER 19 RAM BACKUP MODE

19.1 Outline of RAM Backup Mode .......................................................................................................... 19-2

19.2 Example of RAM Backup when Power is Off ................................................................................... 19-3

19.2.1 Normal Operating State ............................................................................................................ 19-3

19.2.2 RAM Backup State ................................................................................................................... 19-4

19.3 Example of RAM Backup for Saving Power Consumption ............................................................... 19-5

19.3.1 Normal Operating State ............................................................................................................ 19-6

19.3.2 RAM Backup State ................................................................................................................... 19-7

19.3.3 Precautions to Be Observed at Power-On ............................................................................... 19-8

19.3.4 Power-On Limitation ................................................................................................................. 19-8

19.4 Exiting RAM Backup Mode (Wakeup) .............................................................................................. 19-9

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