32186 datasheet(21/1032 Pages) RENESAS

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OVERVIEW

1-3

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

1.1 Outline of 32185/32186 Group

1.1.2 Built-in Multiplier/Accumulator

(1) Built-in high-speed multiplier

• The M32R-FPU contains a 32 bits × 16 bits high-speed multiplier which enables the M32R-FPU to

execute a 32 bits × 32 bits integral multiplication instruction in three CPUCLK periods.

(2) DSP-comparable multiply-accumulate instructions

• The M32R-FPU supports the following four types of multiply-accumulate instructions (or multiplication

instructions) which each can be executed in one CPUCLK period using a 56-bit accumulator.

(1) 16 high-order bits of register × 16 high-order bits of register

(2) 16 low-order bits of register × 16 low-order bits of register

(3) All 32 bits of register × 16 high-order bits of register

(4) All 32 bits of register × 16 low-order bits of register

• The M32R-FPU has some special instructions to round the value stored in the accumulator to 16 or

32 bits or shift the accumulator value before storing in a register to have its digits adjusted. Because

these instructions too are executed in one CPUCLK period, when used in combination with high-

speed data transfer instructions such as Load & Address Update or Store & Address Update, they

enable the M32R-FPU to exhibit superior data processing capability comparable to that of a DSP.

1.1.3 Built-in Single-precision FPU

• The M32R-FPU supports single-precision floating-point arithmetic fully compliant with IEEE 754

standards. Specifically, five exceptions specified in IEEE 754 standards (Inexact, Underflow, Divi-

sion by Zero, Overflow and Invalid Operation) and four rounding modes (round to nearest, round

toward 0, round toward + Infinity and round toward – Infinity) are supported. What’s more, because

general-purpose registers are used to perform floating-point arithmetic, the overhead associated

with transferring the operand data can be reduced.

1.1.4 Built-in Flash Memory and RAM

• The 32185/32186 contains a RAM that can be accessed with zero wait state, allowing to design a

high-speed embedded system.

• The internal flash memory can be written to while mounted on a printed circuit board (on-board

writing). Use of flash memory facilitates development work, because the chip used at the develop-

ment stage can be used directly in mass-production, allowing for a smooth transition from prototype

to mass-production without the need to change the printed circuit board.

• The internal flash memory can be rewritten as many as 100 times.

• The internal flash memory has a virtual flash emulation function, allowing the internal RAM to be

superficially mapped into part of the internal flash memory. When combined with the internal Real-

Time Debugger (RTD) and the M32R Family’s common debug interface (Scalable Debug Interface

or SDI), this function makes the ROM table data tuning easy.

• The internal RAM can be accessed for reading or rewriting data from an external device indepen-

dently of the M32R-FPU by using the Real-Time Debugger. The external device is communicated

using the Real-Time Debugger’s exclusive clock-synchronous serial interface.

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