4502 datasheet(120/214 Pages) RENESAS

120 / 214 page

2.1 I/O pins

2-3

4502 Group

APPLICATION

Rev.2.01

Feb 02, 2005

REJ09B0193-0201

(3)

Port P2

Port P2 is a 2-bit I/O port.

Also, its key-on wakeup function is switched to ON/OFF by the register K20 and K21, and its pull-

up transistor function is switched to ON/OFF by the register PU20 and PU21.

s Input/output of port P2

q Data input to port P2

Set the output latch of specified port P2i (i=0, 1) to “1” with the OP2A instruction. If the output

latch is set to “0,” “L” level is input.

The state of port P2 is transferred to register A when the IAP2 instruction is executed.

However, port P2 is 2 bits and A2 and A3 are fixed to “0.”

qData output from port P2

The contents of register A is output to port P2 with the OP2A instruction.

The output structure is an N-channel open-drain.

(4)

Port P3

Port P3 is a 2-bit I/O port.

s Input/output of port P3

q Data input to port P3

Set the output latch of specified port P3i (i=0, 1) to “1” with the OP3A instruction. If the output

latch is set to “0,” “L” level is input.

The state of port P3 is transferred to register A when the IAP3 instruction is executed.

However, port P3 is 2 bits and A2 and A3 are fixed to “0.”

qData output from port P3

The contents of register A is output to port P3 with the OP3A instruction.

The output structure is an N-channel open-drain.

4502 Datasheet(PDF) 120 Page - Renesas Technology Corp