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4502 Datasheet(PDF) 126 Page - Renesas Technology Corp |
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4502 Datasheet(HTML) 126 Page - Renesas Technology Corp |
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126 / 214 page  2.1 I/O pins 2-9 4502 Group APPLICATION Rev.2.01 Feb 02, 2005 REJ09B0193-0201 (7) Timer control register W6 Bit 0 of register W6 selects the P12/CNTR function, and bit 1 controls the CNTR output. Set the contents of this register through register A with the TW6A instruction. The contents of register W6 is transferred to register A with the TAW6 instruction. Table 2.1.7 shows the timer control register W6. Table 2.1.7 Timer control register W6 Timer control register W6 at reset : 00002 at RAM back-up : state retained R/W This bit has no function, but read/write is enabled. This bit has no function, but read/write is enabled. Timer 1 underflow signal divided by 2 output Timer 2 underflow signal divided by 2 output P12 (I/O) / CNTR input P12 (input) / CNTR input/output Not used Not used CNTR output control bit P12/CNTR function selection bit 0 1 0 1 0 1 0 1 W63 W62 W61 W60 Notes 1: “R” represents read enabled, and “W” represents write enabled. 2: When setting the port, W63–W61 are not used. |
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