SH7713 datasheet(666/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

666 / 904 page

Section 17 Serial I/O with FIFO (SIOF)

Rev.1.50 Aug. 30, 2006 Page 626 of 860

REJ09B0288-0150

Start

Yes

End

No.

Set SIMDR, SISCR, SITDAR,

SIRDAR, SICDAR, and SIFCTR

Set TXE bit in SICTR to 1

TDREQ=1?

Set SITDR

Output SITDR contents from TXD_SIO

synchronously with SIOFSYNC

Transfer

ended?

Clear TXE bit in SICTR to 0

Set operating mode, serial clock,

slot positions for transmit/receive

data, slot position for control data,

and the upper limit value of FIFO

request

Set transmit data

Set to disable transmission

Submit transmission request

to disable transmission

when frame synchronous

signal is transmitted

Transmit

End transmission

Time Chart

SIOF Settings

SIOF Operation

Set to enable transmission

Figure 17.11 Example of Transmission Operation in Slave Mode

Reception in Slave Mode: Figure 17.12 shows an example of settings and operation for slave

mode reception.

SH7713 Datasheet(PDF) 666 Page - Renesas Technology Corp