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7721 Datasheet(PDF) 467 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 467 Page - Renesas Technology Corp |
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467 / 577 page  APPENDIX Appendix 2. Memory assignment in SFR area 7721 Group User’s Manual 17–4 0 : “0” immediately after reset. 1 : “1” immediately after reset. ? : Undefined immediately after reset. : Always “0” at reading. 0 0 : Always undefined at reading. : “0” immediately after reset. Fix this bit to “0.” : It is possible to read the bit state at reading. The written value becomes valid. : It is possible to read the bit state at reading. The written value becomes invalid. : The written value becomes valid. It is impossible to read the bit state. : Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid. RW RO WO ? 0 : Always “1” at reading. 1 Access characteristics State immediately after a reset UART0 transmit/receive control register 0 UART0 transmit/receive mode register UART0 baud rate register UART0 transmit buffer register UART1 receive buffer register Register name UART0 transmit/receive control register 1 UART0 receive buffer register UART1 transmit/receive mode register UART1 baud rate register UART1 transmit buffer register UART1 transmit/receive control register 0 UART1 transmit/receive control register 1 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 2816 2916 2B16 2C16 2D16 2E16 2F16 2A16 2016 2116 2216 2316 2416 2516 2616 2716 3F16 Address Access characteristics RW WO WO RO RO b7 b0 WO RW RO RO RO RW RW RO RO RW WO WO WO RW RO RW RW State immediately after reset 1 00 0 0016 0 00 0 00 0 ? b7 b0 0016 00 0 0 0 0 1 0 00 0 0 0 0 0 1 00 0 00 0 0 0 0 1 0 ? ? ? ? ? ? ? ? ? ? ? A-D register 5 A-D register 1 A-D register 3 A-D register 2 A-D register 4 A-D register 0 A-D register 6 A-D register 7 RO RO RO RO RO RO RO RO RO RO ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?? ? |
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