7721 datasheet(494/577 Pages) RENESAS

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APPENDIX

Appendix 3. Control registers

7721 Group User’s Manual

17–31

DMAC control register L

0 : Fixed

1 : Rotating

Bit

Bit name

Functions

At reset

Priority select bit

Undefined

0 : No request

1 : Requested (Note 1)

DMAC control register L (Address 6816)

3, 2

TC pin validity bit

0 : Invalid

(P103 pin functions as a

programmable I/O port (CMOS).)

1 : Valid

(P103 pin functions as TC pin (N-

channel open-drain).)

Nothing is assigned.

–

DMA0 request bit

DMA1 request bit

DMA2 request bit

DMA3 request bit

0RW

Notes 1. The state of bits 4 to 7 are not changed when writing “1” to these bits.

2. •When writing to this register while any of DMAi enable bits (bits 4 to 7 at address

6916) is “1,” set m flag to “1” and use the LDM or STA instruction. When DMAi

request bit (bits 4 to 7 at address 6816) must not be changed, set DMAi request bit to

“1.”

•When writing to this register while all of DMAi enable bits (bits 4 to 7 at address 6916)

are “0,” m flag may be “0” or “1.” Use the LDM or STA instruction for writing to this

set DMAi request bit to “1.”

DMAC control register H

1 : DMA request

(Valid when software DMA source

is selected.)

The value is “0” at reading.

Bit

Bit name

Functions

At reset

Software DMA0 request bit

0 : Disabled

1 : Enabled

DMAC control register H (Address 6916)

0WO

DMA0 enable bit

0RW

Software DMA1 request bit

Software DMA2 request bit

Software DMA3 request bit

DMA0 enable bit

DMA1 enable bit

DMA2 enable bit

DMA3 enable bit

Note: When any of bits 4 to 7 is set to “1,” use the CLB or SEB instruction for writing to this

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