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7721 Datasheet(PDF) 575 Page - Renesas Technology Corp

Part # 7721
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  577 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7721 Datasheet(HTML) 575 Page - Renesas Technology Corp

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GLOSSARY
7721 Group User’s Manual
2
This section briefly explains the terms used in this user’s manual. The terms defined here apply to this
manual only.
Term
Access
Access space
Access characteristics
Branch
Bus control signal
Countdown
Count source
Countup
External area
External bus
External device
Internal area
Interrupt routine
Overflow
Read-modify-write
instruction
Signal required for access
to external device
Stop mode
UART
Underflow
Wait mode
Meaning
Means performing read, write, or read and write.
In DRAMC, also means performing DRAM refresh.
An accessible memory space of up to 16 Mbytes.
Means whether accessible or not.
Means moving the program’s execution point (= address) to another location.
__
__
____
____
____
_____
_____
A generic name for ALE, E, R/W, BLE, BHE, RDY, HOLD, HLDA,
BYTE, ST0, and ST1 signals.
Means decreasing by 1 and counting.
A signal that is counted by timers A and B, the UARTi baud rate
register (BRGi) and the watchdog timer. That is f2, f16, f64, f512
selected by the count source select bits and others.
Means increasing by 1 and counting.
An accessible area for external devices connected. It is up to 16-
Mbyte external area.
A generic name for the external address bus and the external
data bus.
Devices connected externally to the microcomputer. A generic
name for a memory, an I/O device and a peripheral IC.
An accessible internal area. A generic name for areas of the
internal RAM and the SFR.
A routine that is automatically executed when an interrupt request
is accepted. Set the start address of this routine into the interrupt
vector table.
A state where the countup resultant is greater than the counter
resolution.
An instruction that reads the memory contents, modifies them
and writes back to the same address. Relevant instructions are
the ASL, ASR, CLB, DEC, INC, LSR, ROL, ROR, SEB instructions.
A generic name for bus control, address bus, and data bus signals.
A state where the oscillation circuit halts and the program execution
is stopped. By executing the STP instruction, the microcomputer
enters the stop mode.
Clock asynchronous serial I/O. When used to designate the name
of a functional block, this term also means the serial I/O which
can be switched to the cock synchronous serial I/O.
A state where the countdown resultant is greater than the counter
resolution.
A state where the oscillation circuit is operating, however, the
program execution is stopped. By executing the WIT instruction,
the microcomputer enters the wait mode.
Relevant term
Access
Access
Countup
Countdown
Internal area
External area
Underflow
Countup
Bus
control
signal
Wait mode
Clock
synchronous
serial I/O
Overflow
Countdown
Stop mode



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