7906 datasheet(393/531 Pages) RENESAS

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FLASH MEMORY VERSION

7906 Group User’s Manual Rev.2.0

19-16

19.2 Flash memory CPU reprogramming mode

19.2.5. Full status check

If an error has occurred, bits SR.4 and SR.5 of the status register are set to “1” upon completion of the

programming or erase operation. Therefore, the result of the programming or erase operation can be

recognized by checking these status (in other words, full status check).

Table 19.2.3 lists the errors and the states of bits SR.4 and SR.5, and Figure 19.2.6 shows the full status

check flowchart and the action to be taken if any error has occurred.

Table 19.2.3 Errors and States of bits SR.3 to SR.5

Command sequen-

ce error

Erase error

Programming error

• Commands are not correctly written.

• Data other than “D016” and “FF16” is written at the 2nd bus cycle of the

block erase command (Note).

• Data other than“2016” and “FF16” is written at the 2nd bus cycle of the

erase-all-blocks command (Note).

• Although the block erase or erase-all-blocks command is executed,

these blocks are not correctly erased.

• Although the programming command is executed, programming is not

correctly performed.

Error occurrence conditions

Status register

SR.5

SR.4

Error

Notes: When “FF16” is written at the 2nd bus cycle of any of these commands, the microcomputer enters the read

array mode. Simultaneously with this, the command code written at the 1st bus cycle is cancelled.

Fig. 19.2.6 Full status check flowchart and actions to be taken if any error has ocurred

Read status register

SR.5 = 0?

Completed.

YES

Erase error

YES

Command sequence

error

SR.4 = 1

and

SR.5 = 1

SR.4 = 0?

YES

Programming error

➀ Execute the clear status command to clear SR.4 and SR.5 to “0.”

➁ Execute the correct command again.

Note: If the same error occurs, however, the block cannot be used.

• • • •

Note: Under the condition that any of SR.4 and SR.5 = “1,” none of the programming, block erase, erase-all-blocks commands can be

accepted. To execute any of these commands, in advance, execute the clear status register command.

➀ Execute the clear status command to clear SR.5 to “0.”

➁ Execute the block erase or erase-all-unlocked-blocks command again.

Note: If the same error occurs, however, the block cannot be used.

➀ Execute the clear status command to clear SR.4 to “0.”

➁ Execute the programming command again.

Note: If the same error occurs, however, the block cannot be used.

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