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APPENDIX

7906 Group User’s Manual Rev.2.0

20-103

Appendix 8. 7906 Group Q & A

Interrupts

If an interrupt request (b) occurs while an interrupt routine (a) is executed, is it true that the main

routine is not executed at all after the execution of the interrupt routine (a) is completed until the

execution of the INTACK sequence for the next interrupt (b) starts?

(2)

If the next interrupt request (b) occurs immediately after sampling pulse ➀ is generated, the

microcomputer executes one instruction of the main routine before executing the INTACK

sequence for (b). It is because that the interrupt request is sampled by the next sampling

pulse ➁.

An interrupt request is sampled by a sampling pulse generated synchronously with the CPU’s op-code

fetch cycle.

(1)

If the next interrupt request (b) occurs before sampling pulse ➀ for the RTI instruction is gener-

ated, the microcomputer executes the INTACK sequence for (b) without executing the main routine.

(No instruction of the main routine is executed.) It is because that sampling is completed while

executing the RTI instruction.

Conditions:

q Flag I is cleared to “0” by executing the RTI instruction.

q The interrupt priority level of interrupt (b) is higher than IPL of the main routine.

q The interrupt priority detection time = 2 cycles of fsys

Interrupt routine (a)

Main routine

INTACK sequence

for interrupt (b)

Sequence of

execution

RTI instruction

INTACK sequence for interrupt (b)

Interrupt request (b)

Interrupt routine (a)

Sampling pulse

RTI instruction

➀

Main routine

Interrupt request (b)

Sampling pulse

➀

INTACK sequence

for interrupt (b)

One instruction executed

➁

Interrupt routine (a)

RTI instruction

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