7906 datasheet(232/531 Pages) RENESAS

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THREE-PHASE WAVEFORM MODE

7906 Group User’s Manual Rev.2.0

10-27

10.4 Three-phase mode 1

Fig. 10.4.1 Initial setting example for registers relevant to three-phase mode 1 (1)

Timers A0 through A3 are inactive.

Count start register 0

(address 4016)

0 0

Stops counting in timer A0.

Stops counting in timer A1.

Stops counting in timer A2.

Stops counting in timer A3.

Continues to the next page.

Note: The contents of the three-phase output polarity set buffer

are reversed once before the output level is stabilized.

Therefore, at this time, be sure to set the reversed level of

the level which the user desires to output.

Setting of dead-time timer

Dead-time timer

(address A716)

A value in the range from “0016” to “FF16”

is set.

Setting of waveform output mode register

Waveform output mode register

(address A616)

Dead-time timer trigger

select bit

Falling edge of one-shot

pulse

Waveform output is disabled.

Three-phase mode 1

Three-phase output polarity

set buffer (Note)

0 : “H” output

1 : “L” output

✕ : It may be either “0” or “1.”

Setting of three-phase output data register 0, 1

Three-phase output data register 0

(address A816)

Interrupt request interval set bit

0 : Every second time

1 : Every forth time

Clock-source-of-dead-time-timer

select bits

0 0 : f2

0 1 : f2/2

1 0 : f2/4

b7 b6

Interrupt validity output select bit

0 : At each even-numbered

underflow of timer A3

1 : At each odd-numbered

underflow of timer A3

Released from W-phase output

fixation.

Released from V-phase output

fixation.

Released from U-phase output

fixation.

Three-phase output data register 1

(address A916)

✕ : It may be either “0” or “1.”

Setting of timers A0 through A2 to one-shot pulse mode

Timer A0/A1/A2 mode register

(addresses 5616 to 5816)

Count source select bits

(See Table 7.2.3.)

Setting of timer A3 to timer mode

Timer A3 mode register

(address 5916)

0 0

Setting of timer A0/A1/A2/A3 interrupt request to “disabled”

Timer A0/A1/A2/A3 interrupt

control register

(addresses 7516 to 7816)

0 0

No Interrupt request

Interrupt disabled

Setting of timer A3 carrier wave’s period

A value in the range from “000016” to

“FFFF16” is set.

(b8)

(b15)

Setting of output width of each phase of timers A0

through A2

A value in the range from “000016” to

“FFFF16” is set.

(b8)

(b15)

Timer A3 register

(addresses 4D16, 4C16)

Timer A0 register

(addresses 4716, 4616)

Timer A1 register

(addresses 4916, 4816)

Timer A2 register

(addresses 4B16, 4A16)

Timer A01 register

(addresses D116, D016)

Timer A11 register

(addresses D316, D216)

Timer A21 register

(addresses D516, D416)

Internal output for stabilization of output level

Count start register 0

(address 4016)

Starts counting in timer A0.

Starts counting in timer A1.

Starts counting in timer A2.

Starts counting in timer A3.

111

Count source select bits

(See Table 7.2.3.)

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