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38C3 Datasheet(PDF) 153 Page - Renesas Technology Corp |
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38C3 Datasheet(HTML) 153 Page - Renesas Technology Corp |
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153 / 224 page ![]() 3-8 38C3 Group User’s Manual APPENDIX 3.1 Electrical characteristics tw(RESET) tc(XIN) twH(XIN) twL(XIN) tc(CNTR) twH(CNTR) twL(CNTR) twH(INT) twL(INT) tc(SCLK) twH(SCLK) twL(SCLK) tsu(SIN-SCLK) th(SCLK-SIN) Reset input “L” pulse width Main clock input cycle time (XIN input) Main clock input “H” pulse width Main clock input “L” pulse width CNTR0, CNTR1 input cycle time CNTR0, CNTR1 input “H” pulse width CNTR0, CNTR1 input “L” pulse width INT0–INT2 input “H” pulse width INT0–INT2 input “L” pulse width Serial I/O clock input cycle time Serial I/O clock input “H” pulse width Serial I/O clock input “L” pulse width Serial I/O input setup time Serial I/O input hold time tw(RESET) tc(XIN) twH(XIN) twL(XIN) tc(CNTR) twH(CNTR) twL(CNTR) twH(INT) twL(INT) tc(SCLK) twH(SCLK) twL(SCLK) tsu(SIN-SCLK) th(SCLK-SIN) Limits µs ns ns ns ns ns ns ns ns ns ns ns ns ns Parameter Min. 2 125 45 40 250 105 105 80 80 800 370 370 220 100 Typ. Max. Symbol Unit Limits µs ns ns ns ns ns ns ns ns ns ns ns ns ns Parameter Min. 2 125 45 40 500/(VCC–2) 250/(VCC–2)–20 250/(VCC–2)–20 230 230 2000 950 950 400 200 Typ. Max. Symbol Unit Reset input “L” pulse width Main clock input cycle time (XIN input) Main clock input “H” pulse width Main clock input “L” pulse width CNTR0, CNTR1 input cycle time CNTR0, CNTR1 input “H” pulse width CNTR0, CNTR1 input “L” pulse width INT0–INT2 input “H” pulse width INT0–INT2 input “L” pulse width Serial I/O clock input cycle time Serial I/O clock input “H” pulse width Serial I/O clock input “L” pulse width Serial I/O input setup time Serial I/O input hold time Table 3.1.9 Timing requirements 2 (Vcc = 2.5 to 4.0 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted) 3.1.5 Timing requirements and switching characteristics Table 3.1.8 Timing requirements 1 (Vcc = 4.0 to 5.5 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted) |
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