38C3 datasheet(154/224 Pages) RENESAS

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3-9

APPENDIX

3.1 Electrical characteristics

38C3 Group User’s Manual

twH(SCLK)

twL(SCLK)

td(SCLK-SOUT)

tV(SCLK-SOUT)

tr(SCLK)

tf(SCLK)

tr(CMOS)

tf(CMOS)

twH(SCLK)

twL(SCLK)

td(SCLK-SOUT)

tV(SCLK-SOUT)

tr(SCLK)

tf(SCLK)

tr(CMOS)

tf(CMOS)

Limits

Parameter

Min.

tc(SCLK)/2–30

–30

Typ.

Max.

140

Symbol

Unit

Notes 1: When the P-channel output disable bit (bit 7 of address 001916) is “0.”

2: The XOUT, XCOUT pins are excluded.

Serial I/O clock output “H” pulse width

Serial I/O clock output “L” pulse width

Serial I/O output delay time

(Note 1)

Serial I/O output valid time

(Note 1)

Serial I/O clock output rising time

Serial I/O clock output falling time

CMOS output rising time

(Note 2)

CMOS output falling time

(Note 2)

Table 3.1.10 Switching characteristics 1

(Vcc = 4.0 to 5.5 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted)

Limits

Parameter

Min.

tC(SCLK)/2–50

–30

Typ.

Max.

350

Symbol

Unit

Serial I/O clock output “H” pulse width

Serial I/O clock output “L” pulse width

Serial I/O output delay time

(Note 1)

Serial I/O output valid time

(Note 1)

Serial I/O clock output rising time

Serial I/O clock output falling time

CMOS output rising time

(Note 2)

CMOS output falling time

(Note 2)

Table 3.1.11 Switching characteristics 2

(Vcc = 2.5 to 4.0 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted)

Notes 1: When the P-channel output disable bit (bit 7 of address 001916) is “0.”

2: The XOUT, XCOUT pins are excluded.

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