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CDCE62005 Datasheet(PDF) 34 Page - Texas Instruments

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Part # CDCE62005
Description  Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
PDF  76 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDCE62005 Datasheet(HTML) 34 Page - Texas Instruments

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Device Registers: Register 7
CDCE62005
SCAS862 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com
Table 12. CDCE62005 Register 7 Bit Definitions
SPI
RAM BIT NAME
RELATED
DESCRIPTION/FUNCTION
BIT
BIT
BLOCK
0
A0
Address 0
1
1
A1
Address 1
1
2
A2
Address 2
1
3
A3
Address 3
0
4
0
LFRCSEL0
VCO Core
Loop Filter Control Setting
EEPROM
5
1
LFRCSEL1
VCO Core
Loop Filter Control Setting
EEPROM
6
2
LFRCSEL2
VCO Core
Loop Filter Control Setting
EEPROM
7
3
LFRCSEL3
VCO Core
Loop Filter Control Setting
EEPROM
8
4
LFRCSEL4
VCO Core
Loop Filter Control Setting
EEPROM
9
5
LFRCSEL5
VCO Core
Loop Filter Control Setting
EEPROM
10
6
LFRCSEL6
VCO Core
Loop Filter Control Setting
EEPROM
11
7
LFRCSEL7
VCO Core
Loop Filter Control Setting
EEPROM
12
8
LFRCSEL8
VCO Core
Loop Filter Control Setting
EEPROM
13
9
LFRCSEL9
VCO Core
Loop Filter Control Setting
EEPROM
14
10
LFRCSEL10
VCO Core
Loop Filter Control Setting
EEPROM
15
11
LFRCSEL11
VCO Core
Loop Filter Control Setting
EEPROM
16
12
LFRCSEL12
VCO Core
Loop Filter Control Setting
EEPROM
17
13
LFRCSEL13
VCO Core
Loop Filter Control Setting
EEPROM
18
14
LFRCSEL14
VCO Core
Loop Filter Control Setting
EEPROM
19
15
LFRCSEL15
VCO Core
Loop Filter Control Setting
EEPROM
20
16
LFRCSEL16
VCO Core
Loop Filter Control Setting
EEPROM
21
17
LFRCSEL17
VCO Core
Loop Filter Control Setting
EEPROM
22
18
LFRCSEL18
VCO Core
Loop Filter Control Setting
EEPROM
23
19
LFRCSEL19
VCO Core
Loop Filter Control Setting
EEPROM
24
20
LFRCSEL20
VCO Core
Loop Filter Control Setting
EEPROM
25
21
RESERVED
—
Must be set to "0"
EEPROM
26
22
TESTMUX1
Diagnostics
Set to “1”
EEPROM
If set to “0” it enables short delay for fast operation
27
23
SEL_DEL2
Smart Mux
EEPROM
If Set to “1” Long Delay recommended for Input References below 150MHz.
28
24
TEXTMUX2
Diagnostics
Set to “1”
EEPROM
If set to “0” it enables short delay for fast operation
29
25
SEL_DEL1
Smart Mux
EEPROM
If Set to “1” Long Delay recommended for Input References below 150MHz.
Read Only
If EPLOCK reads “0” EEPROM is unlocked. If EPLOCK reads “1”, then the
30
26
EPLOCK
Status
EEPROM
EEPROM is locked (see Table 4 for how to lock the EEPROM – this can only
be executed once after which the EEPROM is locked permanently).
31
27
RESERVED
Status
Read Only Always reads “1”
EEPROM
34
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :CDCE62005



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