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CDCE62005 Datasheet(PDF) 40 Page - Texas Instruments

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Part # CDCE62005
Description  Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
PDF  76 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDCE62005 Datasheet(HTML) 40 Page - Texas Instruments

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CDCE62005
SCAS862 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com
Table 15. CDCE62005 Universal Input Buffer Configuration Matrix (continued)
PRI_IN CONFIGURATION MATRIX
SETTINGS
CONFIGURATION
Register.Bit
→
5.7
5.1
5.0
5.8
5.9
5.6
Bit Name
→
HYSTEN
INBUFSELY
INBUFSELX
PRI_TERMSEL
PRIINVBB
ACDCSEL
Hysteresis
Mode
Coupling
Termination
Vbb
1
1
0
0
0
0
ENABLED
LVPECL
AC
Internal
1.9V
1
1
0
0
0
1
ENABLED
LVPECL
DC
Internal
1.2V
1
1
0
1
X
X
ENABLED
LVPECL
—
External
—
1
1
1
0
0
0
ENABLED
LVDS
AC
Internal
1.2V
1
1
1
0
0
1
ENABLED
LVDS
DC
Internal
1.2V
1
1
1
1
X
X
ENABLED
LVDS
—
External
—
0
X
X
X
X
X
OFF
—
—
—
—
1
X
X
X
X
X
ENABLED
—
—
—
—
LVDS Fail Safe Mode
Differential data line receivers can switch on noise in the absence of an input signal. This occurs when the bus
driver is turned off or the interconnect is damaged or missing. Traditionally the solution to this problem involves
incorporating an external resistor network on the receiver input. This network applies a steady-state bias voltage
to the input pins. The additional cost of the external components notwithstanding, the use of such a network
lowers input signal magnitude and thus reduces the differential noise margin. The CDCE62005 provides internal
failsafe circuitry on all LVDS inputs if enabled as shown in Table 16 for DC termination only.
Table 16. LVDS Failsafe Settings
Bit Name
→
FAILSAFE
LVDS Failsafe
Register.Bit
→
5.11
0
Disabled for all inputs
1
Enabled for all inputs
Smart Multiplexer Controls
The smart multiplexer implements a configurable switching mechanism suitable for many applications in which
fault tolerance is a design consideration. It includes the multiplexer itself along with three dividers. With respect to
the multiplexer control, Table 17 provides an overview of the configurations supported by the CDCE62005.
Table 17. CDCE62005 Smart Multiplexer Settings
REGISTER 5 SETTINGS
EECLKSEL
AUXSEL
SECSEL
PRISEL
SMART MULTIPLEXER MODE
5.5
5.4
5.3
5.2
1
0
0
1
Manual Mode: PRI_IN selected
1
0
1
0
Manual Mode: SEC_IN selected
1
1
0
0
Manual Mode: AUX_IN selected
1
0
1
1
Auto MOde: PRI_IN then SEC_IN
1
1
1
1
Auto Mode: PRI_IN then SEC_IN then AUX_IN
0
X
1
1
REF_SEL pin selects PRI_IN or SEC_IN
40
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