SLWS132 datasheet(29/46 Pages) TI

29 / 46 page

GRAYCHIP, INC.

- 24 -

APRIL 27, 1999

GC4014 QUAD RECEIVER CHIP

DATA SHEET REV 0.6

This document contains information which may be changed at any time without notice

5.15

CHANNEL OUTPUT PAGE (PAGE = 0)

Addresses 16 through 31 are used to read output values. The outputs are 16 bit two’s complement

numbers which are read as two 8 bit bytes, the lower address contains the lower byte. See Table 1 for the output

value definitions when SUM_MODE is used. The address assignments are:

ADDRESSES

NAME

ADDRESSES

NAME

16,17

AOUT, I-half

24,25

COUT, I-half

18,19

AOUT, Q-half

26,27

COUT,Q-half

20,21

BOUT, I-half

28,29

DOUT, I-half

22,23

BOUT,Q-half

30,31

DOUT,Q-half

These are all read only registers.

5.16

KEEPALIVE STATUS PAGE (PAGE = 1)

ADDRESS 16:

Clock Status

BIT

TYPE

NAME

DESCRIPTION

KACK

This bit monitors the keepalive clock.

KA_MODE

This bit monitors the keepalive mode.

2-7

unused

These bits are used for factory test purposes only.

ADDRESS 17:

Mask Revision

BIT

TYPE

NAME

DESCRIPTION

0-7

REVISION

Mask revision number.

This address can be used to determine the mask revision number for the GC4014. The mask revision

numbers are shown in Table 5 below (the mask codes are printed on the GC4014 package).

Table 5: Mask Revisions

Mask

Revision

Number

(Address 17)

Release Date

Mask Code

on Package

Description

October 1997

55532B

Original

January 1998

55532C

Corrected problems with non-symmetry mode, did not

change mask revision number in address 17.

SLWS132 Datasheet(PDF) 29 Page - Texas Instruments

SLWS132 Datasheet(HTML) 29 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datasheet Download

Link URL