TMS370 datasheet(8/66 Pages) TI

8 / 66 page

TMS370Cx4x

8-BIT MICROCONTROLLER

SPNS016C – NOVEMBER 1992 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

program counter (PC) (continued)

Memory

Program Counter (PC)

PCH

PCL

0000h

7FFEh

7FFFh

Figure 2. Program Counter After Reset

memory map

The TMS370Cx4x family architecture is based on the Von Neumann architecture, where the program memory

and data memory share a common address space. All peripheral input/output is memory mapped in this same

common address space. As shown in Figure 3, the TMS370Cx4x family provides memory-mapped RAM, ROM,

data EEPROM, EPROM, input/output pins, peripheral functions, and system interrupt vectors.

The peripheral file contains all input/output port control, peripheral status and control, EPROM and EEPROM

memory programming, and system-wide control functions. The peripheral file is located between 1010h and

107Fh and is logically divided into seven peripheral file frames of 16 bytes each. Each on-chip peripheral is

assigned to a separate frame through which peripheral control and data information is passed.

TMS370 Datasheet(PDF) 8 Page - Texas Instruments