 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMS370 Datasheet(PDF) 21 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TMS370 Datasheet(HTML) 21 Page - Texas Instruments |
|
|
21 / 66 page  TMS370Cx4x 8-BIT MICROCONTROLLER SPNS016C – NOVEMBER 1992 – REVISED FEBRUARY 1997 21 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timer 1 module (continued) Table 13. Timer 1 Module Registers Memory Map† PF BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REG Modes: Dual-Compare and Capture/Compare P040 Bit 15 T1 Counter MSB Bit 8 T1CNTR P041 Bit 7 T1 Counter LSB Bit 0 T1CNTR P042 Bit 15 Compare Register MSB Bit 8 T1C P043 Bit 7 Compare Register LSB Bit 0 T1C P044 Bit 15 Capture/Compare Register MSB Bit 8 T1CC P045 Bit 7 Capture/Compare Register LSB Bit 0 T1CC P046 Bit 15 Watchdog Counter MSB Bit 8 WDCNTR P047 Bit 7 Watchdog Counter LSB Bit 0 WDCNTR P048 Bit 7 Watchdog Reset Key Bit 0 WDRST P049 WD OVRFL TAP SEL† WD INPUT SELECT2† WD INPUT SELECT1† WD INPUT SELECT0† — T1INPUT SELECT2 T1INPUT SELECT1 T1INPUT SELECT0 T1CTL1 P04A WD OVRFL RST ENA† WD OVRFL INT ENA WD OVRFL INT FLAG T1 OVRFL INT ENA T1 OVRFL INT FLAG — — T1 SW RESET T1CTL2 Mode: Dual-Compare P04B T1EDGE INT FLAG T1C2 INT FLAG T1C1 INT FLAG — — T1EDGE INT ENA T1C2 INT ENA T1C1 INT ENA T1CTL3 P04C T1 MODE = 0 T1C1 OUT ENA T1C2 OUT ENA T1C1 RST ENA T1CR OUT ENA T1EDGE POLARITY T1CR RST ENA T1EDGE DET ENA T1CTL4 Mode: Capture/Compare P04B T1EDGE INT FLAG — T1C1 INT FLAG — — T1EDGE INT ENA — T1C1 INT ENA T1CTL3 P04C T1 MODE = 1 T1C1 OUT ENA — T1C1 RST ENA — T1EDGE POLARITY — T1EDGE DET ENA T1CTL4 Modes: Dual-Compare and Capture/Compare P04D — — — — T1EVT DATA IN T1EVT DATA OUT T1EVT FUNCTION T1EVT DATA DIR T1PC1 P04E T1PWM DATA IN T1PWM DATA OUT T1PWM FUNCTION T1PWM DATA DIR T1IC/CR DATA IN T1IC/CR DATA OUT T1IC/CR FUNCTION T1IC/CR DATA DIR T1PC2 P04F T1 STEST T1 PRIORITY — — — — — — T1PRI † Once the WD OVRFL RST ENA bit is set, these bits cannot be changed until a reset; this applies only to the standard watchdog and to simple counter. In the hard watchdog, these bits can be modified at any time; the WD INPUT SELECT2 bits are ignored. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
