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TPS65721 Datasheet(PDF) 21 Page - Texas Instruments |
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TPS65721 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 50 page ![]() TPS65720 TPS65721 www.ti.com SLVS979 – OCTOBER 2009 If the BAT voltage falls below VLOWV during the battery detection test, it indicates that the battery has been removed. The device then checks for battery insertion. The FET Q2 is turned on and sources IPRECHG out of BAT for the duration of tDET. If the battery voltage does not rise above VRCH, it indicates that a battery has been inserted, and a new charge cycle begins. If the voltage rises above VRCH, it is possible that a fully charged battery has been inserted. To check for this, IBAT(DET) is pulled from the battery for tDET. If the voltage falls below VLOWV, a battery is not present. The device continuously checks for the presence of a battery. CHARGE TERMINATION ON/OFF Charge termination can be disabled by setting the Bit <TERM_EN>=0. When termination is disabled, the device goes through the pre-charge, fast-charge, and CV phases, then remains in the CV phase. During the CV phase, the charger behaves like an LDO with an output voltage equal to VBAT(REG) and is able to source currents up to ICHG or IINmax, whichever is less. Battery detection is not performed. The Bit <CH_ACTIVE>=0 once the current falls below ITERM and does not go t o1 until the input power is toggled. When termination is disabled, the pre-charge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS pin functionality) is also disabled if Bit <TERM_EN>=0 and the TS pin is unconnected. TIMERS The charger in TPS65720 has internal safety timers for the pre-charge and fast-charge phases to prevent potential damage to either the battery or the system. The default values for the timers can be changed in register CHGCONFIG2. The pre-charge timer and fast charge timer will run with their nominal speed defined in register CHCONFIG2 if ICH_SCL[1,0]=01, which equals a charge current of 50% defined with the ISET resistor. If ICH_SCL[1,0] are set to higher or lower fast- charge current, the fast charge timers and pre-charge timers are scaled automatically. For instance, with ICH_SCL[1,0]=11, which equals 100% of fast charge current, the safety timers will time out in half the time defined in register CHCONFIG2. Changing the pre-charge current with I_PRE[1,0] will not change the pre-charge or fast-charge timers. DYNAMIC TIMER FUNCTION During the fast-charge phase, several events increase the timer durations. 1. The system load current activates the DPM loop which reduces the available charging current 2. The input current is reduced because the input voltage has fallen to VIN(LOW) 3. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG) During each of these events, the internal timers are slowed down proportionately to the reduction in charging current. For example, if the charging current is reduced by half, the fast-charge timer is twice as long as programmed. A modified charge cycle with the thermal loop active is shown in Figure 25 Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link(s): TPS65720 TPS65721 |
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