MAC7200 datasheet(242/976 Pages) FREESCALE

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A7S Nexus3 Programmers Model

MAC7200 Microcontroller Family Reference Manual, Rev. 2

164

Freescale Semiconductor

NOTE

The PCR must only be modified during system reset, or while the Nexus is

otherwise idle or disabled to insure correct output port and output clock

functionality

11.10.4 Nexus Register Access via JTAG

Access to Nexus register resources is enabled by loading a single instruction (“NEXUS-ACCESS”) into the

JTAG Instruction Register (IR). For the A7S Nexus3 block, the JTAG IR value is programmable at the

platform or SoC integration level. It can be programmed to any of the non-ARM7 implemented IR values.

Table below shows the current ARM7 IR values (as defined by ARM).

Table 11-34. PCR Field Description

Field

Description

31–30

OPC

Output Port Mode Control

00 Reduced Port Mode (2 bits)

01 Reduced Port Mode (2 bits)

10 Reduced Port Mode (2 bits)

11 Full Port Mode (8 bits)

MCK_EN

Nexus Message Clock Enable

1 Nexus Message Clock (MCKO) is enabled

0 Nexus Message Clock (MCKO) is disabled

28–26

MCK_DIV

Nexus Message Clock Divide Ratio

000

MCKO is 1x the processor clock freq.

001

MCKO is 1/2x the processor clock freq.

010

Reserved

011

MCKO is 1/4x the processor clock freq.

100–110 Reserved

111

MCKO is 1/8x the processor clock freq.

MSC

MSEO Pin Control

0 Select 1 MSEO pin

1 Select 2 MSEO pins

24–0

Reserved for future functionality (read as 0)

Table 11-35. ARM7 JTAG Instructions

IR[3:0]

Usable for NEXUS-ACCESS?

JTAG Instruction

0x0

EXTEST (ARM720T)

0x1

YES

not publicly implemented

0x2

SCAN_N (ARM7TDMI-S)

0x3

SAMPLE/PRELOAD (ARM720T)

0x4

RESTART (ARM7TDMI-S)

0x5

CLAMP (ARM720T)

0x6

YES

not publicly implemented

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