MAC7200 datasheet(73/976 Pages) FREESCALE

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MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

lxxiii

Each peripheral module chapter (12.2, “The SPP DMA Controller Module (SPP_DMA2)” through

Chapter 34, “Port Integration Module (PIM_MAC7202)”) contains a register description subsection that

details the location and definition of the user-accessible control and status bits and fields for the peripheral.

All register descriptions in this manual use bit 31, 15 or 7 (depending on the register size) to represent the

most significant bit and bit 0 to represent the least significant bit. Refer to Section 9.8, “Accessing

registers” for details on how registers may be accessed.

Each register description subsection includes a register diagram figure showing bit field mnemonic names

and locations followed by a table containing the full name for each bit field, a short description of

operational characteristics and exact bit value definitions. The figure and tables below show an example

of the format used for register figures, field descriptions and the conventions used to specify bit fields.

Row Label

Column Content

Bit number, specifies the location of the bit or field within the register.

Behavior for read accesses. If named, the description table below the register diagram specifies the

definition. If zero, the bit will always read as zero. If shaded, the read value is undefined and the bit

position is reserved and must be ignored for future compatibility.

Behavior for write accesses. If named, the description table below the register diagram specifies the

definition. If shaded, the bit position is reserved and must be written as zero for future compatibility.

Reset

Bit state immediately after a reset operation. Zero or one indicates how the bit state is affected by

reset, an emdash indicates that the bit state is not affected by reset.

Reg Addr

Specifies the address of the most significant byte of the register (for a 16- or 32-bit register). Base is

the module address as specified in Chapter 9, “Device Memory Map’, Table 9-4 on page 9-108. Offset

is a hexadecimal number in the format 0x0000, or a formula used to calculate the offset, that is added

to Base to calculate the address of the register.

Table iii. Register Diagram Conventions

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