MAC7200 datasheet(19/976 Pages) FREESCALE

19 / 976 page

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

xix

17.3.1.2

Global Chip-Select Operation..................................................................................344

17.3.2

Chip-Select Registers...................................................................................................344

17.3.2.1

Chip-Select Address Registers (CSAR0–CSAR2)..................................................345

17.3.2.2

Chip-Select Mask Registers (CSMR0–CSMR2).....................................................345

17.3.2.3

Chip-Select Control Registers (CSCR0–CSCR2) ...................................................347

17.4

Functional Description.....................................................................................................349

17.4.1

Data Transfer Operation ..............................................................................................349

17.4.2

Data Byte Alignment and Physical Connections.........................................................349

17.4.3

Bus Cycle Execution....................................................................................................350

17.4.3.1

Data Transfer Cycle States.......................................................................................350

17.5

FlexBus Bus Aborts .........................................................................................................351

17.5.1

IPI Register Interface ...................................................................................................351

17.5.2

FlexBus Interface.........................................................................................................352

17.6

FlexBus Differences from MAC71xx..............................................................................352

17.7

FlexBus Application Usage .............................................................................................353

17.7.1

Enabling the FlexBus...................................................................................................353

17.7.2

Global Chip Select Mode.............................................................................................353

17.7.3

FlexBus speed ..............................................................................................................354

17.7.4

How to use the external bus in Expanded Secured/Unsecured Mode .........................354

17.7.5

How to Use the External Bus in Single Chip Unsecured Mode ..................................355

17.7.6

Enabling and Disabling CLKOUT ..............................................................................356

Chapter 18

FLASH (H7Fb) and FLASH Controller (PFLASH)

18.1

Introduction......................................................................................................................357

18.2

Flash Features ..................................................................................................................358

18.2.1

General Features ..........................................................................................................358

18.2.2

Main Array Features ....................................................................................................358

18.2.3

Shadow Block Features ...............................................................................................358

18.2.4

Flash Modes.................................................................................................................358

18.3

Flash Implementation ......................................................................................................358

18.3.1

MAC72x1 Flash...........................................................................................................358

18.3.2

MAC72x2 Flash...........................................................................................................360

18.4

Flash External Pins ..........................................................................................................361

18.5

PFLASH Bus Aborts .......................................................................................................361

18.5.1

IPI Register Interface ...................................................................................................361

18.5.2

Flash Array Interface ...................................................................................................361

18.6

PFLASH Differences MAC72x2 from MAC71xx ..........................................................361

18.7

PFLASH Application Usage............................................................................................362

18.7.1

Flash Terminology .......................................................................................................362

18.7.2

Enabling the PFLASH .................................................................................................363

18.7.3

Flash Array Memory Map ...........................................................................................363

18.7.4

Flash Registers.............................................................................................................363

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