MAC7200 datasheet(250/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

172

Freescale Semiconductor

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Upon direct (traditional only) or indirect branch after returning from Debug Mode.

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Upon direct (traditional only) or indirect branch after occurrence of queue overrun (can be caused

by any trace message), provided Program Trace is enabled.

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Upon direct (traditional only) or indirect branch after the periodic program trace counter has

expired indicating 255 without-sync Program Trace Messages have occurred since the last

with-sync message occurred.

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Upon direct (traditional only) or indirect branch after assertion of the Event In (EVTI) pin if the

EIC bits within the DC Register have enabled this feature.

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Upon direct (traditional only) or indirect branch after the sequential instruction counter has expired

indicating 255 instructions have occurred between branches or since the last bit was entered in the

history field.

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Upon direct (traditional only) or indirect branch after a BTM Message was lost due to an attempted

access to a secure memory location (for SOCs with security).

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Upon direct (traditional only) or indirect branch after a BTM Message was lost due to a collision

with two other higher priority messages entering the FIFO.

If the A7S Nexus3 module is enabled at reset, an EVTI assertion initiates a Program Trace Indirect Branch

History with Sync. Message (if Program Trace is enabled) upon the first indirect branch. The message will

be a history type message because the ARM7 core will be in full 32-bit ARM mode upon exit from reset.

The history field will contain all taken/not taken direct branch and predicated instructions which occur

before the first indirect branch.

The formats for Program Trace Direct/Indirect Branch with Sync. Messages and Indirect Branch History

with Sync. Messages are as follows:

Exception conditions that result in Program Trace Synchronization are summarized in Table 11-39.

(1–32 bits)

(1–8 bits)

(4 bits)

(6 bits)

HIST

F-ADDR

I-CNT

SRC

TCODE (011101)

Max length = 82 bits; Min length = 13 bits

Figure 11-32. Indirect Branch History w/ Sync. Message Format

(1–32 bits)

(1–8 bits)

(4 bits)

(6 bits)

F-ADDR

I-CNT

SRC

TCODE (001011 or 001100)

Max length = 50 bits; Min length = 12 bits

Figure 11-33. Direct/Indirect Branch with Sync. Message Format (traditional)

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