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MAC7200 Datasheet(PDF) 103 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 103 Page - Freescale Semiconductor, Inc |
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103 / 976 page ![]() System Wakeup MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 25 • Core clears the MDIS bit in the peripheral 3.5 System Wakeup Because the interrupt controller has a combinatorial bypass signal, that is active even during low power modes, all interrupt sources in the system will serve as wakeup signals, with a flexible priority masking scheme (i.e.-only interrupts above a certain priority will wake the system). This gives us the following sources to wake up the system: The general flow to setup a wakeup is as follows: 1. Set the ENBWCR bit in the MWCR register in the MCM 2. Set the PRILVL[3:0] bits in the MWCR register in the MCM 3. Clear any pending interrupts in the peripheral(s) that will be used to generate wakeup interrupts 4. Set the appropriate level in the ICR register in the interrupt controller corresponding to the interrupt source(s) that will be used for wakeup 5. Write the IMRL and/or IMRH registers in the interrupt controller to enable all interrupts that will be used for wakeup 6. Setup the interrupt(s) in the peripheral(s) that will be used to generate wakeup interrupts. Generally, this involves setting an interrupt enable and clearing an interrupt mask Once the system has woken up, the general flow to identify the source of the wakeup is as follows: 1. Read the IPRH and IPRL registers in the interrupt controller to determine which (if any) interrupt wakeup sources are pending 2. Once the wakeup sources have been identified, clear all sources 3.6 Low Power Mode Differences from MAC71xx • STOP mode is not supported • Wakeup from DOZE is only on interrupts now — Wakeup from VREG API is removed — Wakeup from PIM Keypad Wake-Up (KWU) is removed. Wakeup from an external source can still be done using the normal interrupt functionality of the PIM. Table 3-2. Wakeup Sources Where to enable Pending Status in INTC ? Where to clear Interrupt Peripheral INTC MCM (MWCR reg) Yes Peripheral INTC |
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