DAC3282 datasheet(39/53 Pages) TI

39 / 53 page

SDIO

SCLK

TXENABLE

internal

digitalin

DIGVDD 18

GND

SDENB

RESETB

internal

digitalin

DIGVDD 18

GND

DAC3282

www.ti.com

SLAS646A – DECEMBER 2009 – REVISED FEBRUARY 2010

Table 8. Example LVDS Data Input Levels

Resulting

Resulting Differential

Applied Voltages

Common-Mode

Logical Bit Binary

Voltage

Equivalent

VA,B

VCOM

1.4 V

1.0 V

400 mV

1.2 V

1.0 V

1.4 V

–400 mV

1.2 V

0.8 V

400 mV

1.0 V

0.8 V

1.2 V

–400 mV

CMOS DIGITAL INPUTS

Figure 47 shows a schematic of the equivalent CMOS digital inputs of the DAC3282. SDIO, SCLK and

TXENABLE have pull-down resistors while SDENB and RESETB have pull-up resistors internal to the DAC3282.

See the specification table for logic thresholds. The pull-up and pull-down circuitry is approximately equivalent to

100k

Ω.

Figure 47. CMOS/TTL Digital Equivalent Input

REFERENCE OPERATION

The DAC3282 uses a bandgap reference and control amplifier for biasing the full-scale output current. The

full-scale output current is set by applying an external resistor RBIAS to pin BIASJ. The bias current IBIAS through

resistor RBIAS is defined by the on-chip bandgap reference voltage and control amplifier. The default full-scale

output current equals 16 times this bias current and can thus be expressed as:

IOUTFS = 16 × IBIAS = 16 × VEXTIO / RBIAS

Each DAC has a 4-bit independent coarse gain control via coarse_daca(3:0) and coarse_dacb (3:0) in the

CONFIG4 register. Using gain control, the IOUTFS can be expressed as:

IOUTAFS = (DACA_gain + 1) × IBIAS = (DACA_gain + 1) × VEXTIO / RBIAS

IOUTBFS = (DACB_gain + 1) × IBIAS = (DACB_gain + 1) × VEXTIO / RBIAS

Where VEXTIO is the voltage at terminal EXTIO. The bandgap reference voltage delivers an accurate voltage of

1.2V. This reference is active when extref_ena = ‘0’ in CONFIG25. An external decoupling capacitor CEXT of 0.1

mF should be connected externally to terminal EXTIO for compensation. The bandgap reference can additionally

be used for external reference operation. In that case, an external buffer with high impedance input should be

applied in order to limit the bandgap load current to a maximum of 100 nA. The internal reference can be

disabled and overridden by an external reference by setting the CONFIG25 extref_ena control bit. Capacitor CEXT

may hence be omitted. Terminal EXTIO thus serves as either input or output node.

The full-scale output current can be adjusted from 20 mA down to 2 mA by varying resistor RBIAS or changing the

externally applied reference voltage. The internal control amplifier has a wide input range, supporting the

full-scale output current range of 20 dB.

Submit Documentation Feedback

Product Folder Link(s): DAC3282

DAC3282 Datasheet(PDF) 39 Page - Texas Instruments

DAC3282 Datasheet(HTML) 39 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

Datasheet Download

Link URL