DS3161 datasheet(46/384 Pages) MAXIM

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DS3161/DS3162/DS3163/DS3164

TYPE

FUNCTION

the positive clock edge of the referenced clock pin if the clock pin signal is not

inverted, otherwise it is sampled on the falling edge of the clock. The signal is typically

referenced to the RLCLKn line clock input pins, but it can be referenced to the

RCLKOn output pins.

This input signal can be inverted.

DS3: 44.736 Mbps +20ppm

E3: 34.368 Mbps +20ppm

CC52: 52 Mbps +20ppm

RLCVn: When the port line interface is configured for UNI mode and the framer is not

configured for one of the “-OHM” modes, the BPV counter in the encoder/decoder

block is incremented each clock when this signal is high. The signal is sampled on the

positive clock edge of the referenced clock pin if the clock pin signal is not inverted,

otherwise it is sampled on the falling edge of the clock. The signal is typically

referenced to the RLCLKn line clock input pins, but it can be referenced to the

RCLKOn output pins.

This input signal can be inverted.

ROHMIn: When the port framer is configured for one of the “-OHM” modes, this signal

is used to mark the overhead bits on the RDATn pins when it is high. The DS316x

will ignore overhead bits. The signal is sampled on the positive clock edge of the

referenced clock pin if the clock pin signal is not inverted, otherwise it is sampled on

the falling edge of the clock. The signal is typically referenced to the RLCLKn line

clock input pins, but it can be referenced to the RCLKOn output pins.

This input signal can be inverted.

DS3/E3 OVERHEAD INTERFACE

TOHn

Transmit Overhead / Line OH Mask Input

TOHn: When the port framer is configured for one of the DS3 or E3 framing modes,

this signal will be used to over-write the DS3 or E3 framing overhead bits when

TOHENn is active. In T3 mode, the X-bits, P-bits, M-bits, F-bits, and C-bits are input.

In G.751 E3 mode, all of the FAS, RAI, and National Use bits are input. In G.832 E3

mode, all of the FA1, FA2, EM, TR, MA, NR, and GC bytes are input. The TOHSOFn

signal marks the start of the framing bit sequence. This signal is sampled at the same

time as the TOHCLKn signal transitions high to low.

This signal can be inverted.

TOHENn

Transmit Overhead Enable / Start Of Frame Input

TOHENn: When the port framer is configured for one of the DS3 or E3 framing

modes, this signal will be used the determine which DS3 or E3 framing overhead bits

to over-write with the signal on the TOHn pins. The TOHSOFn signal marks the start

of the framing bit sequence. This signal is sampled at the same time as the TOHCLKn

signal transitions high to low.

This signal can be inverted.

TOHCLKn

Transmit Overhead Clock

TOHCLKn: When the port framer is configured for one of the DS3 or E3 framing

modes, this clock is used for the transmit overhead port signals TOHn, TOHENn and

TOHSOFn. The TOHSOFn output signal is updated and the TOHn and TOHENn

input signals are sampled at the same time this clock signal transitions from high to

low. The external logic is expected to sample TOHSOFn signal and update the TOHn

and TOHENn signals on the rising edge of this clock signal. This clock is a low

frequency clock.

This signal can be inverted.

TOHSOFn

Transmit Overhead Start Of Frame

TOHSOFn: When the port framer is configured for one of the DS3 or E3 framing

modes, this signal is used to mark the start of a DS3 or E3 overhead sequence on the

TOHn pins. In T3 mode, the first X-bit is marked. In G.751 E3 mode, the first bit of

the FAS word is marked. In G.832 E3 mode, the first bit of the FA1 byte is marked.

The sequence starts on the same high to low transition of the TOHCLKn clock that

this signal is high. This signal is updated at the same time as the TOHCLKn signal

DS3161 Datasheet(PDF) 46 Page - Maxim Integrated Products

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