AM3871 datasheet(170/345 Pages) TI1

170 / 345 page

AM3874, AM3872, AM3871

SPRS695

– SEPTEMBER 2011

www.ti.com

7.2.2.1

Dynamic Voltage Frequency Scaling (DVFS)

Each device Core Logic Voltage Domain can be run independently at one of several Operating

Performance Points (OPPs). An OPP for a specific Core Logic Voltage Domain is defined by: (1)

maximum frequencies of operation for Modules within the Domain and (2) an associated supply voltage

range. Trading off power versus performance, OPPs with lower maximum frequencies also have lower

voltage ranges for power savings.

The OPP for a domain can be changed in real-time without requiring a reset. This feature is called

Dynamic Voltage Frequency Scaling (DVFS). For detailed procedures on implementing DVFS, see the

DM814x SmartReflex Application Report (Literature Number: SPRTBD). Table 7-4 contains a list of

voltage ranges and maximum module frequencies for the OPPs of each Core Logic Voltage Domain.

Table 7-4. Device Operating Points (OPPs)

CORE LOGIC VOLTAGE DOMAINS

ARM

CORE

L3/L4,

Cortex A8

HDVPSS

SGX

ISS

Media Ctlr.

DDR

OPP

Core

(MHz)

(MHz)(1)

(MHz)

50%(2)

300

TBD

100%

600

200

400

200

400

120%

720

220

250

400

200

220

400

800

TBD

166%

1000

TBD

(1)

All DDR access must be suspended prior to changing the DDR frequency of operation.

(2)

OPP 50% does not support all CORE peripherals (e.g., EMAC GMII/RGMII, USB2.0, PCIe, SD-DAC, SATA, TBD are not supported).

Although the OPP for each Core Logic Voltage Domain is independently selectable, not all combinations

of OPPs are supported. marks the supported ARM OPPs for a given CORE OPP.

Table 7-5. Supported OPP Combinations(1)(2)

ARM

CORE

OPP166

OPP120

OPP100

OPP50

OPP166

TBD

OPP120

TBD

OPP100

OPP50

(1)

"X" denotes supported combinations.

(2)

The maximum voltage differences between CVDD and any other CVDD_x voltage domain must be

150 mV.

7.2.2.2

Adaptive Voltage Scaling

As mentioned in Section 7.2.2.1, Dynamic Voltage Frequency Scaling (DVFS) above, every OPP has an

associated voltage range. Based on the silicon process, temperature, and chosen OPP, the SmartReflex

modules guide software in adjusting the Core Logic Voltage Domain supply voltages within these ranges.

This technique is called Adaptive Voltage Scaling (AVS). AVS occurs continuously and in real-time,

helping to minimize power consumption in response to changing operating conditions. For detailed

procedures on implementing AVS, see the DM814x SmartReflex Application Report (Literature Number:

SPRTBD).

7.2.3

Memory Power Management

In order to reduce SRAM leakage, many SRAM blocks can be switched from ACTIVE mode to

SHUTDOWN mode. When SRAM is put in SHUTDOWN mode, the voltage supplied to it is automatically

removed and all data in that SRAM is lost.

170

Power, Reset, Clocking, and Interrupts

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