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AM1802 Datasheet(PDF) 164 Page - Texas Instruments

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Part # AM1802
Description  AM1802 ARM Microprocessor
PDF  180 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM1802 Datasheet(HTML) 164 Page - Texas Instruments

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GP [ ]
asinput
n m
GPn m
[ ]
asoutput
4
3
2
1
GP [ ]
asinput
n m
2
1
AM1802
SPRS710C – NOVEMBER 2010 – REVISED MARCH 2012
www.ti.com
5.23.2
GPIO Peripheral Input/Output Electrical Data/Timing
Table 5-92. Timing Requirements for GPIO Inputs(1) (see Figure 5-53)
1.2V, 1.1V, 1.0V
NO.
UNIT
MIN
MAX
1
tw(GPIH)
Pulse duration, GPn[m] as input high
2C(1) (2)
ns
2
tw(GPIL)
Pulse duration, GPn[m] as input low
2C(1) (2)
ns
(1)
The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the device
recognize the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to allow the device
enough time to access the GPIO register through the internal bus.
(2)
C=SYSCLK4 period in ns.
Table 5-93. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs
(see Figure 5-53)
1.2V, 1.1V, 1.0V
NO.
PARAMETER
UNIT
MIN
MAX
3
tw(GPOH)
Pulse duration, GPn[m] as output high
2C(1) (2)
ns
4
tw(GPOL)
Pulse duration, GPn[m] as output low
2C(1) (2)
ns
(1)
This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the
GPIO is dependent upon internal bus activity.
(2)
C=SYSCLK4 period in ns.
Figure 5-53. GPIO Port Timing
5.23.3
GPIO Peripheral External Interrupts Electrical Data/Timing
Table 5-94. Timing Requirements for External Interrupts(1) (see Figure 5-54)
1.2V, 1.1V, 1.0V
NO.
PARAMETER
UNIT
MIN
MAX
1
tw(ILOW)
Width of the external interrupt pulse low
2C(1) (2)
ns
2
tw(IHIGH)
Width of the external interrupt pulse high
2C(1) (2)
ns
(1)
The pulse width given is sufficient to generate an interrupt or an EDMA event. However, if a user wants to have the device recognize the
GPIO changes through software polling of the GPIO register, the GPIO duration must be extended to allow the device enough time to
access the GPIO register through the internal bus.
(2)
C=SYSCLK4 period in ns.
Figure 5-54. GPIO External Interrupt Timing
164
Peripheral Information and Electrical Specifications
Copyright © 2010–2012, Texas Instruments Incorporated
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Product Folder Link(s): AM1802



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