AM1802 datasheet(166/180 Pages) TI1

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AM1802

SPRS710C – NOVEMBER 2010 – REVISED MARCH 2012

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Table 5-95. ARM Debug Features

Category

Hardware Feature

Availability

Software breakpoint

Unlimited

Up to 14 HWBPs, including:

2 precise(1) HWBP inside ARM core which are shared with watch points.

Basic Debug

Hardware breakpoint

8 imprecise(1) HWBPs from ETM’s address comparators, which are shared with trace

function, and can be used as watch points.

4 imprecise(1) HWBPs from ICECrusher.

Up to 6 watch points, including:

2 from ARM core which is shared with HWBPs and can be associated with a data.

Watch point

8 from ETM’s address comparators, which are shared with trace function, and

HWBPs.

2 from ARM core which is shared with HWBPs.

Analysis

Watch point with Data

8 watch points from ETM can be associated with a data comparator, and ETM has

total 4 data comparators.

Counters/timers

3x32-bit (1 cycle ; 2 event)

External Event Trigger In

External Event Trigger Out

Address range for trace

Data qualification for trace

System events for trace control

Trace Control

Counters/Timers for trace control

2x16-bit

State Machines/Sequencers

1x3-State State Machine

Context/Thread ID Comparator

Independent trigger control units

Capture depth PC

4k bytes ETB

On-chip Trace

Capture depth PC + Timing

4k bytes ETB

Capture

Application accessible

(1)

Precise hardware breakpoints will halt the processor immediately prior to the execution of the selected instruction. Imprecise breakpoints

will halt the processor some number of cycles after the selected instruction depending on device conditions.

166

Peripheral Information and Electrical Specifications

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