TLFD500 datasheet(21/38 Pages) TI1

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TLFD500PN

3.3 V INTEGRATED G.LITE ANALOG FRONT END

SLAS207B – JUNE 1999 – REVISED MAY 2000

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

VCR-M – VCXO DAC control register MSB

Address: 00110b

Contents at reset: 00000000b

VCR–M[7]

VCR–M[6]

VCR–M[5]

VCR–M[4]

VCR–M[3]

VCR–M[2]

VCR–M[1]

VCR–M[0]

VCR-L – VCXO DAC control register LSB

Address: 00111b

Contents at reset: 00000000b

VCR–L[3]

VCR–L[2]

VCR–L[1]

VCR–L[0]

Table 8 shows some representative analog outputs.

Table 8. Representative Analog Outputs

OPERATION

HEX RESULT

ANALOG OUTPUT

COMMENTS

VCR–M[7:0] * 24 + VCR–L[3:0]

0x800

0 V

Min scale

0x801

∆V

Just above min

…

0xFFF

2047

∆V

Just below mid

0x000

2048

∆V

Mid scale

0x001

2049

∆V

Just above mid

…

0x7FE

4094

∆V

Just below max

0x7FF

4095

∆V

Max scale

Where step–size,

∆ = (3/4095) V.

For example, if 0xAA7 is desired, VCR-M and VCR-L should be set to 0xAA and 0x07;

if 0x539 is desired, VCR-M and VCR-L should be set to 0x53 and 0x09.

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