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TLFD500 Datasheet(PDF) 29 Page - Texas Instruments |
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TLFD500 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 38 page ![]() TLFD500PN 3.3 V INTEGRATED G.LITE ANALOG FRONT END SLAS207B – JUNE 1999 – REVISED MAY 2000 29 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (continued) clock MIN NOM MAX UNIT Input clock frequency 35.328 MHz Input clock duty cycle 50% electrical characteristics over recommended operating free-air temperature range, fMCLKIN = 35.328 MHz, AVDD_RX/AVDD_TX/AVDD_REF = 3.3 V, DVDD = DVDD_IO = DVDD_RX = 3.3 V, (unless otherwise noted) TX channel (measured differentially) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Gain error –1.5 1.5 dB PAA step gain error ±0.25 dB DC offset 50 100 mV Cross-talk RX to TX channel –70 dB Idle channel noise 65 µVrms Group delay 30 µs Power supply rejection ratio (PSRR) 200 mVp-p at 75 kHz 70 dB Analog output voltage Load = 2000 Ω 3 Vp-p AC Performance SNR Signal-to-noise ratio 70 dB THD Total harmonic distortion ratio 70 kHz at –1 dB (see Note 14) 75 dB TSNR Signal-to-noise + harmonic distortion ratio 68 dB 30.1875 kHz –71 MT Missing-tone test (see Note 15) 81.9375 kHz –71 dB 129.375 kHz –71 Channel Frequency Response (Refer to Figure 13) 30 kHz –1.5 1.5 Filter gain relative to gain at 77.625 kHz Pass-band (ripple) –1 1 dB 180 kHz –70 NOTES: 14. The input signal is the digital equivalent of a sine wave (digital full scale = 0 dB). The normal differential output with this input condition is 3 Vpp. 15. 27 tones, 25.875 to 138 kHz, 4.3125 kHz/step, 0 dB reference outputs MIN NOM MAX UNIT REFP 2.2 2.5 2.8 V REFM 0.3 0.5 0.7 V TXBANDGAP AVDD_REF = 3.3 V 1.4 1.5 1.6 V RXBANDGAP 1.4 1.5 1.6 V VMID_RX 1.5 V digital outputs MIN NOM MAX UNIT VOH High-level output voltage IOH = 2 mA 2.4 V VOL Low-level output voltage IOL = –2 mA 0.6 V |
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