A8521 datasheet(32/35 Pages) ALLEGRO

32 / 35 page

Wide Input Voltage Range, High Efficiency

Fault Tolerant LED Driver

A8521

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

The reverse breakdown voltage rating for the output diode in a

SEPIC circuit should be:

VBD > VOUT(OVP)(max) + VIN(max)

(44)

> 15.9 (V) + 16 (V) = 31.9 V

because the maximum output voltage in this case is VOUT(OVP).

The peak current through the diode is calculated as:

Idp = IIN(max) + 1/2 ΔILused

(45)

= 0.848 (A) + 0.096 (A) = 0.944 A

The third major component in deciding the switching diode is the

reverse current, IR , characteristic of the diode. This characteristic

is especially important when PWM dimming is implemented.

During PWM off-time the boost converter is not switching. This

results in a slow bleeding off of the output voltage, due to leakage

currents. IR can be a large contributor, especially at high tempera-

tures. On the diode that was selected in this design, the current

varies between 1 and 100 μA. It is often advantageous to pick a

diode with a much higher breakdown voltage, just to reduce the

reverse current. Therefore for this example, pick a diode rated for

a VBD of 60 V, instead of just 40 V.

Step 7

Choosing the output capacitors. The output capacitors

must be chosen such that they can provide filtering for both the

boost converter and for the PWM dimming function. The biggest

factors that contribute to the size of the output capacitor are:

PWM dimming frequency and PWM duty cycle. Another major

contributor is leakage current, ILK. This current is the combina-

tion of the OVP leakage current as well as the reverse current of

the switching diode. In this design the PWM dimming frequency

is 200 Hz and the minimum duty cycle is 1%. Typically, the volt-

age variation on the output, VCOUT, during PWM dimming must

be less than 250 mV, so that no audible hum can be heard. The

capacitance can be calculated as follows:

COUT =

fPWM(dimming)

1 – D(min)

1 – 0.01

200 (Hz)

ILK

200 (μA)

3.96 μF

0.250 (V)

VCOUT

(46)

A capacitor larger than 3.96 μF should be selected due to degra-

dation of capacitance at high voltages on the capacitor. Select a

4.7 μF capacitor for this application.

The rms current through the capacitor is given by:

ICOUTrms =

1 – D(max)

D(max)

IOUT

0.240 (A)

0.433 A

1 – 0.765

0.765

(47)

The output capacitor must have a ripple current rating of at least

500 mA. The capacitor selected for this design is a 4.7 μF 50 V

capacitor with a 1.5 A current rating.

Step 8

Selecting input capacitor. The input capacitor must be

selected such that it provides a good filtering of the input voltage

waveform. A estimation rule is to set the input voltage ripple,

ΔVIN, to be 1% of the minimum input voltage. The minimum

input capacitor requirements are as follows:

CIN =

fSW

0.191 (A)

∆ILused

0.24 μF

∆VIN

2 (MHz) 0.05 (V)

(48)

The rms current through the capacitor is given by:

CINrms

∆ILused

0.055 A

0.191 (A)

(49)

A good ceramic input capacitor with a rating of 2.2 μF 25 V will

suffice for this application.

A8521 Datasheet(PDF) 32 Page - Allegro MicroSystems

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