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MSP430F6776IPZ Datasheet(PDF) 65 Page - Texas Instruments |
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MSP430F6776IPZ Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 157 page ![]() ECCN 5E002 TSPA - Technology / Software Publicly Available MSP430F677x MSP430F676x MSP430F674x www.ti.com SLAS768C – SEPTEMBER 2012 – REVISED APRIL 2013 Crystal Oscillator, XT1, Low-Frequency Mode (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, 0.075 XT1DRIVEx = 1, TA = 25°C Differential XT1 oscillator crystal current consumption fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, ΔIDVCC.LF 3 V 0.170 µA from lowest drive setting, LF XT1DRIVEx = 2, TA = 25°C mode fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, 0.290 XT1DRIVEx = 3, TA = 25°C XT1 oscillator crystal fXT1,LF0 XTS = 0, XT1BYPASS = 0 32768 Hz frequency, LF mode XT1 oscillator logic-level fXT1,LF,SW square-wave input frequency, XTS = 0, XT1BYPASS = 1(2) (3) 10 32.768 50 kHz LF mode XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 0, 210 fXT1,LF = 32768 Hz, CL,eff = 6 pF Oscillation allowance for OALF k Ω LF crystals(4) XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 1, 300 fXT1,LF = 32768 Hz, CL,eff = 12 pF XTS = 0, XCAPx = 0(6) 2 XTS = 0, XCAPx = 1 5.5 Integrated effective load CL,eff pF capacitance, LF mode(5) XTS = 0, XCAPx = 2 8.5 XTS = 0, XCAPx = 3 12.0 XTS = 0, Measured at ACLK, Duty cycle, LF mode 30 70 % fXT1,LF = 32768 Hz Oscillator fault frequency, fFault,LF XTS = 0(8) 10 10000 Hz LF mode(7) fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, 1000 XT1DRIVEx = 0, TA = 25°C, CL,eff = 6 pF tSTART,LF Startup time, LF mode 3 V ms fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, 500 XT1DRIVEx = 3, TA = 25°C, CL,eff = 12 pF (1) To improve EMI on the XT1 oscillator, the following guidelines should be observed. (a) Keep the trace between the device and the crystal as short as possible. (b) Design a good ground plane around the oscillator pins. (c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT. (d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins. (e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins. (f) If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins. (2) When XT1BYPASS is set, XT1 circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in the Schmitt-trigger Inputs section of this data sheet. (3) Maximum frequency of operation of the entire device cannot be exceeded. (4) Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the XT1DRIVEx settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following guidelines, but should be evaluated based on the actual crystal selected for the application: (a) For XT1DRIVEx = 0, CL,eff ≤ 6 pF. (b) For XT1DRIVEx = 1, 6 pF ≤ CL,eff ≤ 9 pF. (c) For XT1DRIVEx = 2, 6 pF ≤ CL,eff ≤ 10 pF. (d) For XT1DRIVEx = 3, CL,eff ≥ 6 pF. (5) Includes parasitic bond and package capacitance (approximately 2 pF per pin). Since the PCB adds additional capacitance, it is recommended to verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should always match the specification of the used crystal. (6) Requires external capacitors at both terminals. Values are specified by crystal manufacturers. (7) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag. Frequencies in between might set the flag. (8) Measured with logic-level input frequency but also applies to operation with crystals. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 65 |
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