MSP430F6776IPZ datasheet(85/157 Pages) TI

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ECCN 5E002 TSPA - Technology / Software Publicly Available

MSP430F677x

MSP430F676x

MSP430F674x

www.ti.com

SLAS768C – SEPTEMBER 2012 – REVISED APRIL 2013

SD24_B, AC Performance

fSD24 = 1 MHz, SD24OSRx = 256, SD24REFON = 1

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

SD24GAIN: 1

3 V

SD24GAIN: 2

3 V

SD24GAIN: 4

3 V

SD24GAIN: 8

3 V

Signal-to-noise +

SINAD

fIN = 50Hz

(1)

distortion ratio

SD24GAIN: 16

3 V

SD24GAIN: 32

3 V

SD24GAIN: 64

3 V

SD24GAIN: 128

3 V

SD24GAIN: 1

3 V

THD

Total harmonic distortion

SD24GAIN: 8

fIN = 50Hz

(1)

3 V

SD24GAIN: 32

3 V

(1)

The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π ×

fIN × t)

resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed

for a given range (according to SD24_B recommended operating conditions).

SD24_B, AC Performance

fSD24 = 2 MHz, SD24OSRx = 512, SD24REFON = 1

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

SD24GAIN: 1

3 V

SD24GAIN: 2

3 V

SD24GAIN: 4

3 V

SD24GAIN: 8

3 V

Signal-to-noise +

SINAD

fIN = 50Hz

(1)

distortion ratio

SD24GAIN: 16

3 V

SD24GAIN: 32

3 V

SD24GAIN: 64

3 V

SD24GAIN: 128

3 V

(1)

The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π ×

fIN × t)

resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed

for a given range (according to SD24_B recommended operating conditions).

SD24_B, AC Performance

fSD24 = 32 kHz, SD24OSRx = 512, SD24REFON = 1

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

SD24GAIN: 1

3 V

SD24GAIN: 2

3 V

SD24GAIN: 4

3 V

SD24GAIN: 8

3 V

Signal-to-noise +

SINAD

fIN = 50Hz

(1)

distortion ratio

SD24GAIN: 16

3 V

SD24GAIN: 32

3 V

SD24GAIN: 64

3 V

SD24GAIN: 128

3 V

(1)

The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π ×

fIN × t)

resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed

for a given range (according to SD24_B recommended operating conditions).

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