MSP430F6776IPZ datasheet(83/157 Pages) TI

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ECCN 5E002 TSPA - Technology / Software Publicly Available

MSP430F677x

MSP430F676x

MSP430F674x

www.ti.com

SLAS768C – SEPTEMBER 2012 – REVISED APRIL 2013

SD24_B Performance (continued)

fSD24 = 1 MHz, SD24OSRx = 256, SD24REFON = 1

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SD24GAIN: 1, with external reference (1.2 V)

3 V

-1

Gain error(1)

SD24GAIN: 8, with external reference (1.2 V)

3 V

-2

SD24GAIN: 32, with external reference (1.2 V)

3 V

-2

Gain error temperature

ΔEG/ΔT

coefficient(2), internal

SD24GAIN: 1, 8, or 32 (with internal reference)

3 V

ppm/°C

reference

SD24GAIN: 1 (with external reference)

3 V

Gain error temperature

ΔEG/ΔT

coefficient(2), external

SD24GAIN: 8 (with external reference)

3 V

ppm/°C

reference

SD24GAIN: 32 (with external reference)

3 V

SD24GAIN: 1

3 V

0.1

ΔEG/ΔVCC

Gain error vs VCC

(3)

SD24GAIN: 8

3 V

0.1

%/V

SD24GAIN: 32

3 V

0.4

SD24GAIN: 1 (with Vdiff = 0V)

3 V

2.3

EOS[V]

Offset error(4)

SD24GAIN: 8

3 V

SD24GAIN: 32

3 V

0.5

SD24GAIN: 1 (with Vdiff = 0V)

3 V

-0.2

+0.2

% FS

EOS[FS]

Offset error(4)

SD24GAIN: 8

3 V

-0.7

+0.7

% FS

SD24GAIN: 32

3 V

-1.4

+1.4

% FS

SD24GAIN: 1

3 V

Offset error temperature

ΔEOS/ΔT

SD24GAIN: 8

3 V

0.25

µV/°C

coefficient(5)

SD24GAIN: 32

3 V

0.1

SD24GAIN: 1

3 V

500

ΔEOS/ΔVCC

Offset error vs VCC

(6)

SD24GAIN: 8

3 V

125

µV/V

SD24GAIN: 32

3 V

SD24GAIN: 1

3 V

-120

Common mode rejection at

CMRR,DC

SD24GAIN: 8

3 V

-110

DC(7)

SD24GAIN: 32

3 V

-100

(1)

The gain error EG specifies the deviation of the actual gain Gact from the nominal gain Gnom: EG = (Gact - Gnom)/Gnom. It covers process,

temperature and supply voltage variations.

(2)

The gain error temperature coefficient

ΔEG/ ΔT specifies the variation of the gain error EG over temperature (EG(T) = (Gact(T) -

Gnom)/Gnom) using the box method (that is, minimum and maximum values):

ΔEG/ ΔT = (MAX(EG(T)) - MIN(EG(T) ) / (MAX(T) - MIN(T)) = (MAX(Gact(T)) - MIN(Gact(T)) / Gnom / (MAX(T) - MIN(T))

with T ranging from -40°C to +85°C.

(3)

The gain error vs VCC coefficient ΔEG/ ΔVCC specifies the variation of the gain error EG over supply voltage (EG(VCC) = (Gact(VCC) -

Gnom)/Gnom) using the box method (that is, minimum and maximum values):

ΔEG/ ΔVCC = (MAX(EG(VCC)) - MIN(EG(VCC) ) / (MAX(VCC) - MIN(VCC)) = (MAX(Gact(VCC)) - MIN(Gact(VCC)) / Gnom / (MAX(VCC) -

MIN(VCC))

with VCC ranging from 2.4V to 3.6V.

(4)

The offset error EOS is measured with shorted inputs in 2s complement mode with +100% FS = VREF/G and -100% FS = -VREF/G.

Conversion between EOS [FS] and EOS [V] is as follows: EOS [FS] = EOS [V]×G/VREF; EOS [V] = EOS [FS]×VREF/G.

(5)

The offset error temperature coefficient

ΔEOS/ ΔT specifies the variation of the offset error EOS over temperature using the box method

(that is, minimum and maximum values):

ΔEOS/ ΔT = (MAX(EOS(T)) - MIN(EOS(T) ) / (MAX(T) - MIN(T))

with T ranging from -40°C to +85°C.

(6)

The offset error vs VCC ΔEOS/ ΔVCC specifies the variation of the offset error EOS over supply voltage using the box method (that is,

minimum and maximum values):

ΔEOS/ ΔVCC = (MAX(EOS(VCC)) - MIN(EOS(VCC) ) / (MAX(VCC) - MIN(VCC))

with VCC ranging from 2.4V to 3.6V.

(7)

The DC CMRR specifies the change in the measured differential input voltage value when the common mode voltage varies:

DC CMRR = -20log(

ΔMAX/FSR) with ΔMAX being the difference between the minium value and the maximum value measured when

sweeping the common mode voltage.

The DC CMRR is measured with both inputs connected to the common mode voltage (that is, no differential input signal is applied), and

the common mode voltage is swept from -1V to VCC.

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