BMC150 datasheet(28/141 Pages) ETC2

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Datasheet

eCompass BMC150

Page 28

Confidential

BST-BMC150-DS000-03 | Revision 0.4 | February 2013

Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice. Not intended for publication.

After all enabled axes have been measured, complete data packages consisting of DATAX,

DATAY, DATAZ and RHALL are updated at once in the data registers. This way, it is prevented

that a following axis is updated while the first axis is still being read (axis mix-up) or that MSB

part of an axis is updated while LSB part is being read.

While reading from any data register, data register update is blocked. Instead, incoming new

data is written into shadow registers which will be written to data registers after the previous

read sequence is completed (i.e. upon stop condition in I²C mode, or CSB going high in SPI

mode, respectively). Hence, it is recommended to read out at all data at once (0x42 to 0x49 or

0x4A if status bits are also required) with a burst read.

Single bytes or axes can be read out, while in this case it is not assured that adjacent registers

are not updated during readout sequence.

The “Data ready status” bit (register 0x48 bit0) is set “1” when the data registers have been

updated but the data was not yet read out over digital interface. Data ready is cleared (set “0”)

directly after completed read out of any of the data registers and subsequent stop condition

(I²C) or lifting of CSB (SPI).

In addition, when enabled the “Data overrun” bit (register 0x4A bit7) turns “1” whenever data

registers are updated internally, but the old data was not yet read out over digital interface (i.e.

data ready bit was still high). The “Data overrun” bit is cleared when the interrupt status register

0x4A is read out. This function needs to be enabled separately by setting the “Data overrun En”

bit (register 0x4D bit7)).

Note:

Please also see chapter 7 for detailed register descriptions.

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