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LP3972 Datasheet(PDF) 5 Page - Texas Instruments

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Part # LP3972
Description  Power Management Unit for Advanced Application Processors
PDF  59 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LP3972 Datasheet(HTML) 5 Page - Texas Instruments

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LP3972
www.ti.com
SNVS468J – SEPTEMBER 2006 – REVISED AUGUST 2011
PIN DESCRIPTIONS (continued)
Pin No.
Name
I/O
Type(1)
Description
20
VIN Buck2
I
PWR
Battery input power to Buck2
21
SDA
I/O
D
I2C Data (Bidirectional)
22
SCL
I
D
I2C Clock
23
FB2
I
A
Buck2 input feedback terminal
24
nRSTO
O
D
Reset output from the PMIC to the processor
25
VOUT LDO5
O
PWR
LDO5 output
26
VIN LDO5
I
PWR
Power input to LDO5, this can be connected to VIN or to a separate 1.8V supply.
27
VDDA
I
PWR
Analog Power for VREF, BIAS
28
FB3
I
A
Buck3 Feedback
29
GPIO1 /
I/O
D
General Purpose I/O / Ext. backup battery charger enable pin. This pin enables
nCHG_EN
the main battery / DC source power to charge the backup battery. This pin
toggled via the application processor. By grounding this pin the DC source
continuously charges the backup battery
30
GPIO2
I/O
D
General Purpose I/O
31
VIN Buck3
I
PWR
Battery input power to Buck3
32
SW3
O
PWR
Buck3 switcher output
33
PGND3
G
G
Buck3 NMOS Power Ground
34
BGND1,2,3
G
G
Bucks 1, 2 and 3 analog Ground
35
SYNC
I
D
Frequency Synchronization: Connection to an external clock signal PLL to
synchronize the PMIC internal oscillator.
Input Digital enable pin for the high voltage power domain supplies. Output from
36
SYS_EN
I
D
the Monahans processor.
Digital enable pin for the Low Voltage domain supplies. Output signal from the
37
PWR_EN
I
D
Monahans processor
38
PGND1
G
G
Buck1 NMOS Power Ground
39
SW1
O
PWR
Buck1 Switcher output
40
VIN Buck1
I
PWR
Battery input power to Buck1
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
All Inputs
−0.3V to +6.5V
GND to GND SLUG
±0.3V
Junction Temperature (TJ-MAX)
150°C
Storage Temperature
−65°C to +150°C
Power Dissipation
(TA = 70°C)
(3)
3.2W
Junction-to-Ambient Thermal
Resistance
θJA
(3)
25°C/W
Maximum Lead Temp (Soldering)
260°C
ESD Rating (4)
Human Body Model
2 kV
Machine Model
200V
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits
and associated test conditions, see the Electrical Characteristics tables.
(2)
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3)
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-
OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance
of the part/package in the application (
θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX).
(4)
The Human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. (MIL-STD-883 3015.7) The machine
model is a 200 pF capacitor discharged directly into each pin. (EAIJ).
Copyright © 2006–2011, Texas Instruments Incorporated
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5
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