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ML7344J Datasheet(PDF) 141 Page - List of Unclassifed Manufacturers |
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ML7344J Datasheet(HTML) 141 Page - List of Unclassifed Manufacturers |
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141 / 151 page  FEDL7344C/E/J-04 ML7344C/E/J 141/151 BANK0 (continued) Bit Address Symbol (# test register) 7 6 5 4 3 2 1 0 Description 0x20 C_FIELD_CODE3 C-field setting code #3 0x21 C_FIELD_CODE4 C-field setting code #4 0x22 C_FIELD_CODE5 C-field setting code #5 0x23 M_FIELD_CODE1 M-field 1st byte setting code #1 0x24 M_FIELD_CODE2 M-field 1st byte setting code #2 0x25 M_FIELD_CODE3 M-field 2nd byte setting code #1 0x26 M_FIELD_CODE4 M-field 2nd byte setting code #2 0x27 A_FIELD_CODE1 A-field 1st byte setting 0x28 A_FIELD_CODE2 A-field 2nd byte setting 0x29 A_FIELD_CODE3 A-field 3rd byte setting 0x2A A_FIELD_CODE4 A-field 4th byte setting 0x2B A_FIELD_CODE5 A-field 5th byte setting 0x2C A_FIELD_CODE6 A-field 6th byte setting 0x2D SLEEP/WU_SET SLEEP execution and Wake-up operation setting 0x2E WUT_CLK_SET Wake-up timer clock division setting 0x2F WUT_INTERVAL_H Wake-up timer interval setting (high byte) 0x30 WUT_INTERVAL_L Wake-up timer interval setting (low byte) 0x31 WU_DURATION Continue operation timer (after Wake-up) setting 0x32 GT_SET General purpose timer configuration 0x33 GT_CLK_SET General purpose timer clock division setting 0x34 GT1_TIMER General purpose timer #1 setting 0x35 GT2_TIMER General purpose timer #2 setting 0x36 CCA_IGNORE_LVL ED threshold level setting for excluding CCA judgement 0x37 CCA_LVL CCA threshold level setting 0x38 CCA_ABORT Timing setting for forced termination of CCA operation 0x39 CCA_CTRL CCA control setting and result indication 0x3A ED_RSLT ED value indication 0x3B IDLE_WAIT_H IDLE detection period setting during CCA (high 2bits) 0x3C IDLE_WAIT_L IDLE detection period setting during CCA (low byte) 0x3D CCA_PROG_H IDLE judgement elapsed time indication during CCA (high 2 bits) 0x3E CCA_PROG_L DLE judgement elapsed time indication during CCA (low byte) 0x3F Reserved Reserved 0x40 VCO_VTRSLT VCO voltage adjustment result indication 0x41 ED_CTRL ED detection control setting 0x42 TXPR_LEN_H TX preamble length setting (high byte) 0x43 TXPR_LEN_L TX preamble length setting (low byte) 0x44 POSTAMBLE_SET Postamble length and pattern setting 0x45 SYNC_CONDITION1 RX preamble setting and ED threshold check setting 0x46 SYNC_CONDITION2 ED threshold setting during synchronization 0x47 SYNC_CONDITION3 Bit error tolerance setting in RX preamble and SyncWord detection 0x48-4C Reserved Reserved 0x4D MON_CTRL Monitor function setting 0x4E GPIO0_CTRL GPIO0 pin (pin #16) configuration setting 0x4F GPIO1_CTRL GPIO1 pin (pin #17) configuration setting |
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