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ML7344J Datasheet(PDF) 88 Page - List of Unclassifed Manufacturers |
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ML7344J Datasheet(HTML) 88 Page - List of Unclassifed Manufacturers |
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88 / 151 page ![]() FEDL7344C/E/J-04 ML7344C/E/J 88/151 ●Low speed clock shift detection function ML7344 has low spleed frequency shift detection function to compensate inaccurate clock generated by RC oscillator (external clock or internal RC oscillation circuits). By detecting frequency shift of the wake up timer, host can set wake-up timer parameters which taking frequency shift into consideration. More accurate timer operation is possible by adjusting wake-up timer interval setting ([WUT_INTERVAL_H/L: B0 0x2F/0x30]) or continuous operation timer interval ([WU_DURATION: B0 0x31]). Setting Register Frequency shift detection clock frequency setting [CLK_CAL_SET: B0 0x70] Clock calibration time [CLK_CAL_TIME: B0 0x71] Clock calibration result value [CLK_CAL_H: B0 0x72], [CLK_CAL_L: B0 0x73] This function is to measure low speed wake-up timer cycle by using accurate high speed internal clock and count result will be stored in [CLK_CAL_H/L: B0 0x72/0x73] registers. Above setting and count numbers are as follows: High speed clock counter = {Wakeup timer clock cycle[SLEEP/WU_SET:B0 0x2D(2)] * Clcok calibration time setting ([CLK_CAL_TIME:B0 0x71(5-0)]) / {master clock cycle (26MHz) / clock division setting value ([CLK_CAL_SET: B0 0x70(7-4)])} Clock calibration time is as follows: Clock calibration time[s] = Wakeup timer clock cycle * Clock calibration time setting [Example] Assuming no division in the internal high speed clock, calibration time is set as 10 cycle and set 1,000 to the Wake-up interval timer value. condition: Wakeup timer clock frequency = 32.768kHz Detection clock division setting CLK_CAL_DIV[3:0][CLK_CAL_SET: B0 0x70(7-4)] = 0b0000 Clock calibration time setting [CLK_CAL_TIME] = 0x0A Wake-up interval timert setting [WUT_INTERVAL_H/L:B0 0x2F,30] = 0x03E8 Theoretical high speed clock count = (1/32.768kHz) * 10 / (1/(26/1)MHz) = 7934(0x1EFE) If getting [CLK_CAL_H/L:B0 0x72,73] = 0x1E17 (7703) Counter difference = 7934-7703=231 Frequency shift = (231 * 32.768^2) / (10/(1/(26000/1))-231 * 32.768 = 0.983 kHz Then finding wake-up timer clock frequency accuracy is +3% higher. And the compensation vale (C) is calcurared as below: C = Wake-up timer interval([WUT_INTERVAL_H/L:B0 0x2F,30]) * frequecy shift / 32.768 = 1000 * 0.983 / 32.768 =30 Therefore, setting [WUT_INTERVAL_H/L:B0 0x2F,30] = 1000+30 =0x0406 to achive more accurate inteval timinig. NOTE: If calibration time is too short or if high speed counter is divided into low speed clock, calibration may not be accurate. |
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