ML7344J datasheet(48/151 Pages) ETC2

48 / 151 page

FEDL7344C/E/J-04

ML7344C/E/J

48/151

[Reference Sequence]:

Set Full level threshold and Empy level threshold..Each threshold should set as TXFIFO_THRH[5:0]

([TXFIFO_THRH:B0 0x17(5-0)]) > TXFIFO_THRL[5:0] ([TXFIFO_THRL:B0 0x18(5-0)]). And

enabling Full level threshold by TXFIFO_THRH_EN([TXFIFO_THRH:B0 0x17(7)=0b1.

Enabling FAST_TX mode by FAST_TX_EN([RF_STATUS_CTRL:B0 0x0A(5)])=0b1 and start

writing TX data to the TX_FIFO[WR_TX_FIFO:B0 0x7C] until FIFO-Full interrupt (INT[5] group1)

occurs.

After FIFO-Full interrupt is generated, Clear the interupt. Then disabling Full level threshold

(TXFIFO_THRH_EN=

0b0)

and

enabling

Empty

level

threshold

(TXFIFO_THRL_EN

([TXFIFO_THRL:B0 0x18(7)])=0b1).

After FIFO-Empty interrupt (INT[4] group1) is generated, Clear the interupt. Then disabling Empty

level threshold (TXFIFO_THRL_EN=0b0) and enabling Full level threshold (TXFIFO_THRH_

EN=0b1). Then resume writing TX data to the TX_FIFO until next FIFO-Full interrupt occurs.

Repeat 3.-4. until completion of TX.

NOTE:

When skip disabling threshold level at sequece 3. or 4., depending on TX data read (PHY block) and

TX_FIFO write timing through SPI, in the middle of TX_FIFO writing, unwiilling FIFO-Full interrupt or

FIFO-Empty interrupt may occurs.

ML7344J Datasheet(PDF) 48 Page - List of Unclassifed Manufacturers