Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

ML7344J Datasheet(PDF) 65 Page - List of Unclassifed Manufacturers

Part # ML7344J
Description  Sub-GHz band short range wireless transceiver IC
PDF  151 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC2 [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC2 - List of Unclassifed Manufacturers

ML7344J Datasheet(HTML) 65 Page - List of Unclassifed Manufacturers

Back Button ML7344J Datasheet HTML 61Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 62Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 63Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 64Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 65Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 66Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 67Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 68Page - List of Unclassifed Manufacturers ML7344J Datasheet HTML 69Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 65 / 151 page
background image
FEDL7344C/E/J-04
ML7344C/E/J
65/151
(2) Channel #0 frequency setting
TX frequency can be set by [TXFREQ_I: B1 0x1B], [TXFREQ_FH: B1 0x1C], [TXFREQ_FM: B1 0x1D]
and [TXFREQ_FL: B1 0x1E]. RX frequency can be set by [RXFREQ_I: B1 0x1F], [RXFREQ_FH: B1 0x20],
[RXFREQ_FM: B1 0x21] and [RXFREQ_FL: B1 0x22]. When enabling PLL 1/2 division mode by setting
PLL_MODE([PLL_DIV_SET:B1 0x1A(4)])=0b1, calcurated with fref =FMCK1/2 in the following formula.
Channel #0 frequency setting can be caluculated using the following formula.
ref
rf
f
f
I
=
(Integer part)
20
2
⋅
⎪⎭
⎪
⎬
⎫
⎪⎩
⎪
⎨
⎧
−
=
I
f
f
F
ref
rf
(Integer part)
Here
rf
f
:Channel #0 frequency
ref
f
:PLL reference frequency (=master clock frequency: FMCK1)
I
:Integer part of frequency setting
F
:Fractional part of frequency setting
I (Hex) is set to [TXFREQ_I: B1 0x1B], [RXFREQ_I: B1 0x1F] registers.
F (Hex.) is set to the following registers.
For TX, from MSB, set in order of [TXFREQ_FH: B1 0x1C], [TXFREQ_FM: B1 0x1D], [TXFREQ_FL:
B1 0x1E] registers.
For RX, from MSB, set in order of [RXFREQ_FH: B1 0x20], [RXFREQ_FM: B1 0x21], [RXFREQ_FL:
B1 0x22] registers.
Frequency error (
err
f
) is calculated as follows :
rf
ref
err
f
f
F
I
f
−
⋅
⎭
⎬
⎫
⎩
⎨
⎧ +
=
20
2
[Example]
When set TX channel #0 frequency to 426MHz (master clock 26MHz), the calculations are as follows.
MHz
MHz
I
26
426
=
(Integer part) =16(0x10)
20
2
26
426
⋅
⎭
⎬
⎫
⎩
⎨
⎧
−
=
I
MHz
MHz
F
(Integer part)=403298(0x062762)
[TXFREQ_I: B1 0x1B] = 0x10
[TXFREQ _FH: B1 0x1C] = 0x06
[TXFREQ _FM: B1 0x1D] = 0x27
[TXFREQ _FL: B1 0x1E] = 0x62
Frequency error
err
f
is as follows:
Hz
MHz
MHz
f
err
45
.
11
426
26
2
403298
16
20
−
=
−
⋅
⎭
⎬
⎫
⎩
⎨
⎧ +
=



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com