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HM17CM256 Datasheet(PDF) 48 Page - Hynix Semiconductor |
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HM17CM256 Datasheet(HTML) 48 Page - Hynix Semiconductor |
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48 / 111 page ![]() HM17CM256 - 48 - (33) INSTRUCTION INSTRUCTION TABLE (1) CODE (80 series I/F) CODE INSTRUCTION CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION display data write in 0 0 1 0 0/1 0/1 0/1 Write Data Write in to display RAM display data read out. 0 0 0 1 0/1 0/1 0/1 Read Data Read out from display RAM X address (lower) [0H] 0 1 1 0 0 0 0 0 0 0 0 AX3 AX2 AX1 AX0 Display RAM X direction set X address (upper) [1H] 0 1 1 0 0 0 0 0 0 0 1 * AX6 AX5 AX4 Display RAM X direction set Y address (lower) [2H] 0 1 1 0 0 0 0 0 0 1 0 AY3 AY2 AY1 AY0 Display RAM Y direction set Y address (upper) [3H] 0 1 1 0 0 0 0 0 0 1 1 * AY6 AY5 AY4 Display RAM Y direction set display start line set (lower) [4H] 0 1 1 0 0 0 0 0 1 0 0 LA3 LA2 LA1 LA0 RAM Y address setting corresponds to scan start line of common driver. display start line set (upper) [5H] 0 1 1 0 0 0 0 0 1 0 1 * LA6 LA5 LA4 RAM Y address setting corresponds to scan start line of common driver. N line inversion set (lower) [6H] 0 1 1 0 0 0 0 0 1 1 0 N3 N2 N1 N0 quantity setting of line inversion N line inversion set (upper) [7H] 0 1 1 0 0 0 0 0 1 1 1 * N6 N5 N4 quantity setting of line inversion display control (1) [8H] 0 1 1 0 0 0 0 1 0 0 0 SHI FT MO N ALL ON ON/ OFF SHIFT: common shift direction set, MON: BW/gradation display, ALLON: all on , ON/OFF: display ON/OFF control display control (2) [9H] 0 1 1 0 0 0 0 1 0 0 1 RE V NL IN SW AP RE F REV: display positive / negative, NLIN: n line inversion ON/OFF, SWAP: display data swap, REF: segment positive / negative increment control [AH] 0 1 1 0 0 0 0 1 0 1 0 WIN AIM AYI AXI WIN: window selection, AIM: increment timing selection, AYI:Y increment, AXI:X increment power control [BH] 0 1 1 0 0 0 0 1 0 1 1 AMP ON HA LT DC ON AC L AMPON: internal OP Amp. ON, HALT: power save DCON: boosting circuit ON, ACL: reset LCD duty set [CH] 0 1 1 0 0 0 0 1 1 0 0 * DS2 DS1 DS0 LCD driver duty ratio set boosting coefficient set [DH] 0 1 1 0 0 0 0 1 1 0 1 * VU2 VU1 VU0 Boosting times set bias ratio set [EH] 0 1 1 0 0 0 0 1 1 1 0 * B2 B1 B0 LCD drive bias set RE register set [FH] 0 1 1 0 0/1 0/1 0/1 1 1 1 1 TST0 RE2 RE1 RE0 RE flag set Notice 1) * mark is Don’t Care Notice 2) [ ] The inner side number is an address for internal register read. Notice 3) The commands that upper/lower register settings are demanded are effective at the point of commands input. But electric volume is effective after upper and lower register setting. |
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