HM17CM256 datasheet(58/111 Pages) HYNIX

58 / 111 page

HM17CM256

- 58 -

(34-9) Increment control register set

RE2

RE1

RE0

WIN

AIM

AYI

AXI

(reset :{WIN, AIM, AYI, AXI}=0H, read address :AH)

* : ”Don’t care”

Sets the display RAM address to increment mode when RAM data is accessed.

Per RAM write or read access, the increment or non-increment settings of X and Y address counter are

possible by AIM, AYI, AXI register setting.

When accessing consecutive RAM areas by read or write,

the address increment operation is possible without setting the read or write address by this register setting.

After setting the auto increment register, the X, Y address should be set lower bits first.

Please revise X, Y address register after increment register setting.

When WIN register is set to “1”, the CPU accesses specified area of display RAM.

In this case X, Y

address should be used with auto increment mode set (AXI=”1”, AYI=”1”).

Do not revise X, Y address

WIN=”0”: normal display RAM access

WIN=”1”: window area access at display RAM

The window to be accessed is defined by setting the start X, Y address and end X, Y address.

When accessing display with window area mode, please set X, Y start address and then X, Y window

end address.

When accessing consecutive RAM area, it is possible to access next location without setting the address

by using this command.

X, Y address is unknown after auto increment setting. When WIN register is set

to “1”, the RAM should be accessed after setting start point address and end point address.

And address setting should be done in sequence of start point of X address and Y address, and then

end point of X address and Y address after WIN command setting ( WIN=”1”).

The relationship between AIM, AYI, AXI register and X, Y address increment mode is as follow.

AIM

Increment timing selection

Remark

Both case of writing in and read out display RAM

Only when writing in display RAM( read modify)

notice

This mode is valid when read or write is performed on consecutive RAM location.

notice

This mode is valid when read out consecutive data and modifying the data and then write them in again or

read

write per access.

AYI

AXI

Increment timing selection

Remark

No increment

X address auto increment

Y address auto increment

X, Y address auto increment

notice

Regardless of AIM setting, no auto increment for X and Y address

notice

According to AIM setting, auto increment only for X address.

And X address is increased as followed loop according to REF register( SEG output direction setting

∗) Please refer to RAM address bitmap in (10) relation between display RAM and address

notice

According to AIM setting, auto increment only for Y address

Y address is increased as followed loop regardless of REF register.

00H

MaxH

HM17CM256 Datasheet(PDF) 58 Page - Hynix Semiconductor

HM17CM256 Datasheet(HTML) 58 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL