Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

HM17CM256 Datasheet(PDF) 54 Page - Hynix Semiconductor

Part # HM17CM256
Description  128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
PDF  111 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HM17CM256 Datasheet(HTML) 54 Page - Hynix Semiconductor

Back Button HM17CM256 Datasheet HTML 50Page - Hynix Semiconductor HM17CM256 Datasheet HTML 51Page - Hynix Semiconductor HM17CM256 Datasheet HTML 52Page - Hynix Semiconductor HM17CM256 Datasheet HTML 53Page - Hynix Semiconductor HM17CM256 Datasheet HTML 54Page - Hynix Semiconductor HM17CM256 Datasheet HTML 55Page - Hynix Semiconductor HM17CM256 Datasheet HTML 56Page - Hynix Semiconductor HM17CM256 Datasheet HTML 57Page - Hynix Semiconductor HM17CM256 Datasheet HTML 58Page - Hynix Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 54 / 111 page
background image
HM17CM256
- 54 -
(34)
INSTRUCTION DESCRIPTION
As shown in instruction table, HM17CM256 has abundant command set.
All the data code and command code are valid only when the chip select signal CS is at “0” state.
The left side of the following command code and data table are the setting of 80 series CPU`
interface.
Do not use undefined command code.
(34-1) Write display data on RAM
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
1
0
0/1
0/1
0/1
Display RAM write data
Writing the 8-bit display RAM data
at specified X, Y address.
(34-2) Read display data from RAM
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
1
0/1
0/1
0/1
Display RAM read data
Reading out the 8-bit display RAM data from specified X, Y address.
One Dummy read cycle is needed after X, Y address is set.
(34-3) X address register set
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
0
0
0
AX3
AX2
AX1
AX0
( reset :AX3~AX4=0H,
read address :0H )
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
0
0
1
*
AX6
AX5
AX4
( reset :AX6~AX4=0H,
read address :1H )
* : “Don’t care”
Setting the X direction address address set. The lower 4-bits are set first, and then upper 3-bits are set later.
Please set from lower bit.
(34-4) Y address register set
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
0
1
0
AY3
AY2
AY1
AY0
( reset :AY3~AY0=0H,
read address :2H )
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
0
1
1
*
AY6
AY5
AY4
( reset :AY6~AY4=0H, read address :3H )
* : “Don’t care”
Setting the Y address of display RAM.
The lower 4-bits are set first, and then upper 3-bits are set later.
Please set from lower bit.
00H~51H is valid range at Y address(AY6~AY0). Do not use 52H~FFH range. The Y address(AY6~AY0) of
50H,51H is used for ICON display data address.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com