HM17CM256 datasheet(100/111 Pages) HYNIX

100 / 111 page

HM17CM256

- 100 -

(read timing)

(VDD=2.7

∼3.3V, Ta=-30∼+85°C)

ITEM

SYMBOL

CONDITION

MIN.

MAX.

UNIT

PORT

Address hold timing

Address setup timing

tAH6

tAS6

TBD

System cycle timing

Enable ”L” pulse width

Enable ”H” pulse width

tCYC6

tELR6

tEHR6

TBD

Data setup timing

Data hold timing

tDS6

tDH6

TBD

∼ D

(VDD=2.4

∼2.7V, Ta=-30∼+85°C)

ITEM

SYMBOL

CONDITION

MIN.

MAX.

UNIT

PORT

Address hold timing

Address setup timing

tAH6

tAS6

TBD

System cycle timing

Enable ”L” pulse width

Enable ”H” pulse width

tCYC6

tELR6

tEHR8

TBD

Data setup timing

Data hold timing

tDS6

tDH6

TBD

∼ D

(VDD=1.7

∼2.4V, Ta=-30∼+85°C)

ITEM

SYMBOL

CONDITION

MIN.

MAX.

UNIT

PORT

Address hold timing

Address setup timing

tAH6

tAS6

TBD

System cycle timing

Enable ”L” pulse width

Enable ”H” pulse width

tCYC6

tELR6

tEHR6

TBD

Data setup timing

Data hold timing

tDS6

tDH6

TBD

∼ D

notice)

All timing reference is 20% and 80% of VDD and 80%.

tAS6

tAH6

R/W

(WR)

∼ D

tEHR6

tELR6

tRDD6

tRDH6

tCYC6

(RD)

HM17CM256 Datasheet(PDF) 100 Page - Hynix Semiconductor

HM17CM256 Datasheet(HTML) 100 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL