82802AC datasheet(20/53 Pages) INTEL

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Intel

® 82802AB/AC Firmware Hub

Datasheet

Table 3.

Status Register Definition

WSMS

ESS

VPPS

PSS

DPS

Bit

Description

Write State Machine Status (SR.7). Check SR.7 to determine block erase or program completion.

SR.6–0 are invalid while SR.7 = 0.

1 = Ready

0 = Busy

Erase Suspend Status (SR.6).

1 = Block erase suspended

0 = Block erase in progress/completed

Erase Status (SR.5). If both SR.5 and SR.4 are 1s after a block erase attempt, an improper command

sequence was entered.

1 = Error in block erasure

0 = Successful block erase

Program Status (SR.4).

1 = Error in program

0 = Successful program

VPP Status (SR.3). SR.3 does not provide a continuous indication of VPP level. The WSM interrogates

and indicates the VPP level only after a block erase or program operation. SR.3 is not guaranteed to

reports accurate feedback only when VPP

≠ VPPH1/2.

1 = VPP low detect, operation abort

0 = VPP OK

Program Suspend Status (SR.2).

1 = Program suspended

0 = Program in progress/completed

Device Protect Status (SR.1). SR.1 does not provide a continuous indication of write-lock bit, TBL# pin

or WP# pin values. The WSM interrogates the write-lock bit, TBL# pin or WP# pin only after a block

erase or program operation. Depending on the attempted operation, it informs the system whether or not

the selected block is locked.

1 = Write-lock bit, TBL# pin, or WP# pin Detected, operation abort

0 = Unlock

Reserved for future enhancements (SR.0). SR.0 is reserved for future use and should be masked out

when polling the status register.

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