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M80C286 Datasheet(PDF) 5 Page - Intel Corporation |
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M80C286 Datasheet(HTML) 5 Page - Intel Corporation |
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5 / 60 page  M80C286 Table 2 Instruction Set (Continued) CONDITIONAL TRANSFERS JAJNBE Jump if abovenot below nor equal JAEJNB Jump if above or equalnot below JBJNAE Jump if belownot above nor equal JBEJNA Jump if below or equalnot above JC Jump if carry JEJZ Jump if equalzero JGJNLE Jump if greaternot less nor equal JGEJNL Jump if greater or equalnot less JLJNGE Jump if lessnot greater nor equal JLEJNG Jump if less or equalnot greater JNC Jump if not carry JNEJNZ Jump if not equalnot zero JNO Jump if not overflow JNPJPO Jump if not parityparity odd JNS Jump if not sign JO Jump if overflow JPJPE Jump if parityparity even JS Jump if sign UNCONDITIONAL TRANSFERS CALL Call procedure RET Return from procedure JMP Jump ITERATION CONTROLS LOOP Loop LOOPELOOPZ Loop if equalzero LOOPNELOOPNZ Loop if not equalnot zero JCXZ Jump if register CX e 0 INTERRUPTS INT Interrupt INTO Interrupt if overflow IRET Interrupt return Program Transfer Instructions FLAG OPERATIONS STC Set carry flag CLC Clear carry flag CMC Complement carry flag STD Set direction flag CLD Clear direction flag STI Set interrupt enable flag CLI Clear interrupt enable flag EXTERNAL SYNCHRONIZATION HLT Halt until interrupt or reset WAIT Wait for BUSY not active ESC Escape to extension processor LOCK Lock bus during next instruction NO OPERATION NOP No operation EXECUTION ENVIRONMENT CONTROL LMSW Load machine status word SMSW Store machine status word Process Control Instructions ENTER Format stack for procedure entry LEAVE Restore stack for procedure exit BOUND Detects values outside prescribed range High Level Instructions Memory Organization Memory is organized as sets of variable length seg- ments Each segment is a linear contiguous se- quence of up to 64K (216) 8-bit bytes Memory is addressed using a two component address (a point- er) that consists of a 16-bit segment selector and a 16-bit offset see Figure 4 The segment selector in- dicates the desired segment in memory The offset component indicates the desired byte address within the segment 271103 – 3 Figure 4 Two Component Address 5 |
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