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M80C286 Datasheet(PDF) 6 Page - Intel Corporation |
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M80C286 Datasheet(HTML) 6 Page - Intel Corporation |
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6 / 60 page ![]() M80C286 Table 3 Segment Register Selection Rules Memory Segment Register Implicit Segment Reference Needed Used Selection Rule Instructions Code (CS) Automatic with instruction prefetch Stack Stack (SS) All stack pushes and pops Any memory reference which uses BP as a base register Local Data Data (DS) All data references except when relative to stack or string destination External (Global) Data Extra (ES) Alternate data segment and destination of string operation All instructions that address operands in memory must specify the segment and the offset For speed and compact instruction encoding segment selec- tors are usually stored in the high speed segment registers An instruction need specify only the de- sired segment register and an offset in order to ad- dress a memory operand Most instructions need not explicitly specify which segment register is used The correct segment reg- ister is automatically chosen according to the rules of Table 3 These rules follow the way programs are written (see Figure 5) as independent modules that require areas for code and data a stack and access to external data areas Special segment override instruction prefixes allow the implicit segment register selection rules to be overridden for special cases The stack data and extra segments may coincide for simple programs To access operands not residing in one of the four immediately available segments a full 32-bit pointer or a new segment selector must be loaded Addressing Modes The M80C286 provides a total of eight addressing modes for instructions to specify operands Two ad- dressing modes are provided for instructions that operate on register or immediate operands Register Operand Mode The operand is locat- ed in one of the 8 or 16-bit general registers Immediate Operand Mode The operand is in- cluded in the instruction Six modes are provided to specify the location of an operand in a memory segment A memory operand address consists of two 16-bit components seg- ment selector and offset The segment selector is supplied by a segment register either implicitly cho- sen by the addressing mode or explicitly chosen by a segment override prefix The offset is calculated by summing any combination of the following three address elements the displacement (an 8 or 16-bit immediate val- ue contained in the instruction) the base (contents of either the BX or BP base registers) 271103 – 4 Figure 5 Segmented Memory Helps Structure Software the index (contents of either the SI or DI index registers) Any carry out from the 16-bit addition is ignored Eight-bit displacements are sign extended to 16-bit values Combinations of these three address elements de- fine the six memory addressing modes described below Direct Mode The operand’s offset is contained in the instruction as an 8 or 16-bit displacement ele- ment Register Indirect Mode The operand’s offset is in one of the registers SI DI BX or BP Based Mode The operand’s offset is the sum of an 8 or 16-bit displacement and the contents of a base register (BX or BP) 6 |
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