UPD30121 datasheet(29/76 Pages) NEC

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Data Sheet U14691EJ1V0DS00

µµµµPD30121

(2) 168 MHz model (TA =

−−−−10 to +70°°°°C, VDD2 = 2.6 to 2.7 V, VDD3 = 3.0 to 3.45 V)

(1/2)

Parameter

Symbol

Condition

MIN.

TYP.

MAX.

Unit

Output voltage, high

VOH1

IOH =

−2 mA

0.8VDD3

Output voltage, high

Note 1

VOH2

IOH =

−12 mA

0.8VDD3

IOL = 2 mA

0.4

Output voltage, low

VOL1

IOL = 20

µA0.1

IOL = 12 mA

0.4

Output voltage, low

Note 1

VOL2

IOL = 20

µA0.1

Clock input voltage, high

Note 2

VIH1

0.8 VDD3

VDD3 + 0.3

Clock input voltage, low

Note 2

VIL1

−0.3

0.3 VDD3

Input voltage, high

Note 3

VIH2

2.0

VDD3 + 0.3

Input voltage, low

Note 3

VIL2

−0.3

0.3VDD3

Input voltage, high

Note 4

VIH3

0.75VDD3

VDD3 + 0.3

Input voltage, low

Note 4

VIL3

−0.3

0.6

Hysteresis voltage

Note 4, 5

0.17VDD3

Input leakage current

Note 6

ILI

VDD3 = 3.45 V, VI = VDD3, 0 V

±5

µA

Input leakage current, high

Note 7

ILIH

VDD3 = 3.45 V, VI = VDD3

µA

Input leakage current, low

Note 8

ILIL

VDD3 = 3.45 V, VI = 0 V

−72

µA

Output leakage current

ILO

VDD3 = 3.45 V, VI = VDD3, 0 V

±5

µA

Notes 1. Applied to TPX (0:1), TPY (0:1). A panel resistance of 250

Ω is presumed.

2. Applies to FIRCLK and HSPSCLK pins.

3. Except RTCX1, CLKX1, FIRCLK, HSPSCLK, TPX (0:1), TPY (0:1), ADIN (0:2), AUDIOIN, POWER,

RSTSW#, RTCRST#, GPIO (0:3), SRAS#/GPIO4, SCAS#/GPIO5, SYDIR/GPIO6, SPOWER/GPIO7,

GPIO (8:14), DCD#/GPIO15, BATTINH/BATTINT#, IRING, and KPORT (0:7) pins.

4. Applied to POWER, RSTSW#, RTCRST#, GPIO (0:3), SRAS#/GPIO4, SCAS#/GPIO5, SYDIR/GPIO6,

SPOWER/GPIO7, GPIO (8:14), DCD#/GPIO15, BATTINH/BATTINT#, IRING, and KPORT (0:7) pins.

5. Hysteresis voltage: Difference between the minimum voltage at which the high level of a Schmitt input

signal is not recognized when the signal goes from low to high and the maximum voltage at which the

low level is not recognized when the signal goes from high to low.

6. Except KPORT (0:7) (input pins with pull-down resistor), TPX (0:1), and TPY (0:1) pins.

7. Applied to KPORT (0:7) pin (input pins with pull-down resistor), GPIO (0:3), SRAS#/GPIO4,

SCAS#/GPIO5, SYSDIR/GPIO6, SPOWER/GPIO7, and GPIO (8:14) pins when the internal pull-down

resistor is used.

8. Applied to GPIO (0:3), SRAS#/GPIO4, SCAS#/GPIO5, SYSDIR/GPIO6, SPOWER/GPIO7, and GPIO

(8:14) pins when the internal pull-up resistor is used.

UPD30121 Datasheet(PDF) 29 Page - NEC

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