UPD30121 datasheet(5/76 Pages) NEC

5 / 76 page

Data Sheet U14691EJ1V0DS00

µµµµPD30121

PIN IDENTIFICATION

ADD (0:25):

Address Bus

LCDCS#:

LCD Chip Select

ADIN (0:2):

General Purpose Input for A/D

LCDRDY:

LCD Ready

AFERST#:

AFE Reset

LEDOUT#:

LED Output

AGND:

GND for A/D

MEMCS16#:

Memory Chip Select 16

AUDIOIN:

Audio Input

MEMR#:

Memory Read

AUDIOOUT:

Audio Output

MEMW#:

Memory Write

AVDD:VDD for A/D

MIPS16EN:

MIPS16 Enable

BATTINH:

Battery Inhibit

MPOWER:

Main Power

BATTINT#:

Battery Interrupt Request

MRAS(0:3)#:

DRAM Row Address Strobe

BUSCLK:

System Bus Clock

MUTE:

Mute

CGND:

GND for Oscillator

OFFHOOK:

Off Hook

CKE:

Clock Enable

OPD#:

Output Power Down

CLKSEL (0:2):

Clock Select

PIUGND:

GND for Touch Panel Interface

CLKX1:

Clock X1

PIUVDD:VDD for Touch Panel Interface

CLKX2:

Clock X2

POWER:

Power Switch

CTS#:

Clear to Send

POWERON:

Power On State

CVDD:VDD for Oscillator

RD#:

Read

DATA (0:31):

Data Bus

ROMCS(0:3)#:

ROM Chip Select

DBUS32:

Data Bus 32

RSTOUT:

System Bus Reset Output

DCD#:

Data Carrier Detect

RSTSW#:

Reset Switch

DCTS#:

Debug Serial Clear to Send

RTCRST#:

Real-time Clock Reset

DDIN:

Debug Serial Data Input

RTCX1:

Real-time Clock X1

DDOUT:

Debug Serial Data Output

RTCX2:

Real-time Clock X2

DGND:

GND for D/A

RTS#:

Request to Send

DRTS#:

Debug Serial Request to Send

RxD:

Receive Data

DSR#:

Data Set Ready

SCAS#:

DTR#:

Data Terminal Ready

Column Address Strobe for

SDRAM/SROM

DVDD:VDD for D/A

SCLK:

SDRAM/SROM Clock

FIRCLK:

FIR Clock

SDI:

HSP Serial Data Input

FIRDIN#:

FIR Data Input

SDO:

HSP Serial Data Output

FS:

Frame Synchronization

SEL:

IrDA Module Select

GND2, GND3:

Ground

SHB#:

System Hi-Byte Enable

GNDP, GNDPD:

Ground for PLL

SMODE (1:2):

SDRAM Mode

GPIO (0:49):

General Purpose I/O

SPOWER:

SDRAM Power Control

HC0:

Hardware Control 0

SRAS#:

HLDACK#:

Hold Acknowledge

Row Address Strobe for

SDRAM/SROM

HLDRQ#:

Hold Request

SYSDIR:

System Bus Buffer Direction

HSPMCLK:

HSP Codec Master Clock

TELCON:

Telephone Control

HSPSCLK:

HSP Codec Serial Clock

TPX (0:1):

Touch Panel X I/O

ILCSENSE:

Input Loop Current Sensing

TPY (0:1):

Touch Panel Y I/O

IOCHRDY:

I/O Channel Ready

TxD:

Transmit Data

IOCS16#:

I/O Chip Select 16

UCAS#:

Upper Column Address Strobe

IOR#:

I/O Read

ULCAS#:

Lower Byte of Upper Column

IOW#:

I/O Write

Address Strobe

IRDIN:

IrDA Data Input

UUCAS#:

Upper Byte of Upper Column

IRDOUT#:

IrDA Data Output

Address Strobe

IRING:

Input Ring

VDD2, VDD3:

Power Supply Voltage

KPORT (0:7):

Key Code Data Input

VDDP, VDDPD:

VDD for PLL

KSCAN (0:11):

Key Scan Line

WR#:

Write

LCAS#:

Lower Column Address Strobe

ZWS#:

Zero Wait State

Remark # indicates active low.

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